EP610DC-30 vs EP610DI-35 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610DC-30 disebabkan oleh Altera dan EP610DI-35 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610DC-30 EP610DI-35
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Product Type Classic EPLD (Erasable Programmable Logic Device) —
Family EP610 (Classic Device Family) Altera Classic EPLD
Macrocells 16 —
Logic Expanders 4 (4 product terms per macrocell) —
Usable Gates 300 300
Maximum Pipelined Clock Frequency 100 MHz —
Propagation Delay (tPD) 30 ns —
Dedicated Inputs 16 —
I/O Pins 16 (with output enable) 16 bidirectional
Kemasan 24-pin CERDIP (windowed) 24-pin CDIP (Ceramic DIP)
Jenis Pemasangan Through-Hole Through-hole
Speed Grade -30 (30 ns tPD) —
Technology CMOS EPROM CMOS, UV-erasable
Programmability UV-erasable, windowed EPROM —
Security Bit Yes (protects design after programming) —
Output Modes Registered and Combinatorial —
Suhu Operasi Commercial (0C to +70C) [DATA_NEEDED: industrial/commercial grade range]
Series — EP610
Logic Cells / Macrocells — 16 macrocells
Product Terms — 160
Total Inputs — 20 (including 4 dedicated inputs)
Propagation Delay (tpd) — 35 ns
Maximum Toggle Frequency — 28.6 MHz
Internal Pipelined Data Rate — Up to 100 MHz
Tegangan Pemberi Arus — 5 V
Status RoHS — [DATA_NEEDED: not confirmed in supplied web data]

Laporan Datasheet & Sumber

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