EP610LC-15 vs EP610LI-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610LC-15 disebabkan oleh Altera dan EP610LI-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EP610LI-15 EP610LI-15 - 16-Macrocell CMOS EPLD, 15ns tPD | Altera (Rochester)

EP610LI-15 - 16-Macrocell CMOS EPLD, 15ns tPD | Altera (Rochester)

EP610LI-15 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP610LC-15 EP610LI-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Masa Terakhir Dibeli
Product Type Classic EPLD (Erasable Programmable Logic Device) —
Family Altera Classic EPLD (EP610) —
Logic Elements / Macrocells 16 macrocells —
Equivalent Gates 300 gates —
Propagation Delay (tpd) 15 ns —
Counter Frequency (fmax) 83.3 MHz —
Pipelined Data Rate up to 100 MHz —
Supply Voltage (Vcc) 5 V (single supply) —
Process Technology CMOS CMOS EPROM (UV-erasable)
Kemasan 28-pin PLCC (J-lead, plastic OTP) 24-pin ceramic DIP, side-brazed, windowed (DIP-24)
Jenis Pemasangan Surface Mount —
Bilangan Pin 28 —
Suhu Operasi 0C to +70C (commercial) [DATA_NEEDED: full temperature grade] 0 C to +70 C (commercial, "I" grade)
Programming OTP (one-time programmable) —
Status RoHS unknown Non-compliant (ceramic DIP, SnPb finish typical)
Aras MSL [DATA_NEEDED: MSL rating] [DATA_NEEDED: MSL level]
Device Family — Classic EPLD EP610
Macrocells — 16
Propagation Delay (tPD) — 15 ns
Counter Frequency (fCNT) — 83.3 MHz
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Kiraan Pin — 24
Programming Method — UV erase + EPROM programmer
Logic Blocks — AND/OR array, 16 output macrocells
I/O Standard — TTL/CMOS compatible
Jenis Output — 3-state
Manufacturer (current) — Rochester Electronics (authorized Altera legacy distributor)

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