EP610LC-30 vs EP610LC-25 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610LC-30 disebabkan oleh Intel dan EP610LC-25 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP610LC-30 | EP610LC-25 |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | Classic EPLD (EP610) | Classic EPLD |
| Macro Cells | 16 | — |
| Logic Gates | Equivalent to 300 gates (typical) | — |
| Pin-to-Pin Delay (tPD) | 30 ns | — |
| Pipelined Data Rate | up to 100 MHz | Up to 100 MHz |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Programming Voltage (VPP) | 13 V nominal | — |
| Technology | CMOS EPROM (UV-erasable) | CMOS |
| Kemasan | 24-pin CERDIP / PDIP | PLCC-28 |
| Suhu Operasi | 0 C to +70 C (commercial) / -55 C to +125 C (military) | 0C to +70C (commercial) |
| Erase/Program Cycles | 1000 typical | — |
| Jenis Pemasangan | Through-Hole | Surface Mount |
| Jenis Output | CMOS tri-state (programmable) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED] |
| Logic Compatibility | TTL and CMOS | — |
| Turbo Mode | Yes (registered path bypass) | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 16 |
| Logic Array Blocks (LABs) | — | 4 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Toggle Frequency | — | 100 MHz |
| Tegangan Pemberi Arus | — | 5 V ±5% |
| Programmability | — | UV-erasable (windowed package) |
| I/O Pins | — | [DATA_NEEDED: exact I/O count] |