EP610PC-25 vs EP610DC-25 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610PC-25 disebabkan oleh Altera dan EP610DC-25 disebabkan oleh Rochester Electronics. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610PC-25 EP610DC-25
Merek Altera Rochester Electronics
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Aktif
Device Family Classic EPLD (EP610 series) —
Macro Cells 16 —
Usable Gates 300 —
Propagation Delay (tpd) 25 ns —
Maximum Pipelined Data Rate 100 MHz —
Supply Voltage (Vcc) 5 V (nominal) —
Technology CMOS, EPROM (UV-erasable) CMOS EPROM (UV-erasable)
Device Type OT PLD, PAL-type, CMOS —
Dedicated Inputs 4 —
I/O Pins 20 (bidirectional, JTAG-programmable OE per macrocell) —
Kemasan PDIP-24 (0.3 inch, through-hole) 24-pin CDIP (Ceramic DIP, through-hole)
Suhu Operasi [DATA_NEEDED: operating temperature grade] 0 C to +70 C
Programming Method EPROM (UV-erasable), via Altera programming hardware JEDEC fuse-map / UV-erase
Jenis Pemasangan Through-Hole (DIP) Through Hole
Status RoHS [DATA_NEEDED: RoHS status] —
Family — Altera Classic EPLD
Product Type — EPLD (Erasable Programmable Logic Device)
Macrocells — 16
Equivalent Gates — 300
Maximum Propagation Delay (tPD) — 25 ns
Pipelined Data Rate — Up to 100 MHz
Number of I/O Pins — 22
Number of Dedicated Inputs — 4
Total Pin Count — 24
Supply Voltage (VCC) — 4.75 V to 5.25 V (5 V nominal)
Speed Grade Suffix — -25 (25 ns tPD)

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