EP910LC44 vs EP910LI44 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910LC44 disebabkan oleh Altera dan EP910LI44 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EP910LC44 EP910LC44 - Classic EPLD, 24 Macrocells, 44-Pin PLCC | Intel / Altera

EP910LC44 - Classic EPLD, 24 Macrocells, 44-Pin PLCC | Intel / Altera

EP910LC44 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP910LC44 EP910LI44
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli Obsolete
Product Family Classic EPLD (EP910 Series) —
Manufacturer Altera Corporation (now Intel PSG) —
Device Type Erasable Programmable Logic Device (EPLD) —
Macrocells 24 24
Total Product Terms 240 —
Dedicated Inputs 12 12
I/O Pins 24 —
Total Input Pins 36 (12 dedicated + 24 I/O as inputs) —
Global Clock Inputs 2 —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial)
Propagation Delay (LC grade) [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data] —
Propagation Delay (LC-30 grade) 33 ns (per EP910LC44-30 verified data) —
Process Technology CMOS —
Kemasan 44-pin PLCC (J-leaded) —
Suhu Operasi [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data] —
Programming Method EPROM (erasable UV for ceramic; OTP for plastic PLCC) Altera Logic Programmer card / Data I/O / third-party EPROM programmers
Architecture AND-OR sum-of-products with programmable macrocell feedback PAL-type, CMOS, One-Time-Programmable
Logic Compatibility TTL-compatible CMOS I/O —
Status RoHS [DATA_NEEDED: not stated in verified data] non-compliant (original PLCC-44 lead finish)
Family — Classic EPLD
Package Type — PLCC-44 (J-lead, surface mount)
Total Pins — 44
Bidirectional I/O — 24
Maximum Logic Inputs — 36
Maximum Outputs — 24
Flip-Flops — 24
External Clocks — 2
Maximum Propagation Delay — [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns]
Operating Temperature (L grade) — -40 °C to +85 °C (industrial)
Technology — CMOS
Programmability — UV-erasable (windowed) or OTP
Jenis Pemasangan — Surface Mount (PLCC socket compatible)

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