EP910PC-15 vs EP910PC-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-15 disebabkan oleh Altera dan EP910PC-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910PC-15 EP910PC-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Altera Classic EPLD Altera Classic EPLD
Usable Gates 900 900
Macrocells 24 —
Maximum Pin-to-Pin Delay (tpd) 15 ns —
Counter Frequency (fCNT) 100 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 5 V
Supply Current (Icc) 80 mA typical —
Dedicated Inputs 10 —
Dedicated I/O Pins 12 —
Suhu Operasi 0C to +70C (commercial) 0C to +70C (commercial)
Kemasan 24-pin PDIP (PDIP-24, 0.300 inch) PDIP-24 (PC suffix)
Jenis Pemasangan Through-Hole Through-Hole (DIP)
Process Technology CMOS, UV-erasable —
Programming Method Altera Logic Programmer card EPROM programmer, JEDEC fuse map
Status RoHS [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] [DATA_NEEDED: RoHS status]
Aras MSL Not applicable (through-hole) [DATA_NEEDED: MSL level]
Device — EP910
Macrocell Count — [DATA_NEEDED: macrocell count]
Pin-to-Pin Delay (tPD) — 20 ns
Kiraan Pin — 24
Technology — CMOS EPROM (UV-erasable)
I/O Compatibility — 100% TTL

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