EP910PC-15T vs EP910PC-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-15T disebabkan oleh Altera dan EP910PC-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910PC-15T EP910PC-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Type EPLD (Erasable Programmable Logic Device) —
Family Altera Classic EPLD Altera Classic EPLD
Macrocell Count 24 —
Dedicated Input Pins 10 —
Pin-to-Pin Delay (tPD) 15 ns —
Speed Grade -15 (15 ns) —
Supply Voltage (VCC) 5 V (nominal) 4.75 V to 5.25 V (5 V nominal)
Technology CMOS, UV-erasable / OTP —
Kemasan 40-pin PDIP (Plastic DIP) 24-pin PDIP (PDIP-24, 0.300 inch)
Jenis Pemasangan Through-hole (DIP) Through-Hole
Output Drive Current [DATA_NEEDED: IOL per output] —
Suhu Operasi 0C to +70C (commercial) 0C to +70C (commercial)
Logic Capacity 24 macrocells / 72 product terms (typical Classic architecture) —
Programming Method JEDEC fuse map via Altera LogicMap / MAX+PLUS II Altera Logic Programmer card
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS]
Lead-Free [DATA_NEEDED: lead-free status] —
Security Bit Yes (design protection) —
Tape and Reel Yes (suffix T) —
Usable Gates — 900
Macrocells — 24
Maximum Pin-to-Pin Delay (tpd) — 15 ns
Counter Frequency (fCNT) — 100 MHz
Supply Current (Icc) — 80 mA typical
Dedicated Inputs — 10
Dedicated I/O Pins — 12
Process Technology — CMOS, UV-erasable
Aras MSL — Not applicable (through-hole)

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