EP910PC-30 vs EP910IPC-25 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-30 disebabkan oleh Altera dan EP910IPC-25 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910PC-30 | EP910IPC-25 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | Altera Classic EPLD | Classic EPLD (EP910 series) |
| Macrocells | 24 | 24 |
| Usable Gates | ~450 | 450 |
| Pin-to-Pin Propagation Delay (tPD) | 30 ns | — |
| Maximum Counter Frequency (fCNT) | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V ±10% | 5 V |
| Logic Inputs | 36 dedicated | — |
| I/O Pins | 12 bidirectional | — |
| Logic Array Blocks (LABs) | 4 | — |
| Kemasan | PDIP-40 (plastic DIP, 0.6 inch) | 40-pin PDIP (PDIP-40) |
| Suhu Operasi | 0C to +70C (commercial) | 0C to +70C (commercial grade) |
| Programming Technology | UV-erasable EPROM cell | — |
| TTL Emulation | 100% TTL-compatible | — |
| Power Dissipation | [DATA_NEEDED: power dissipation mW] | — |
| Status RoHS | Non-compliant (contains lead, PDIP package) | — |
| Jenis Pemasangan | Through-hole DIP | Through-Hole |
| Manufacturer | — | Altera (now Intel) |
| Architecture | — | PAL-type EPLD, CMOS, UV/OTP |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Frequency (fMAX) | — | 40 MHz |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| Programming Method | — | EPROM cell (OTP / UV erasable) |
| Development Tool | — | MAX+PLUS II |