EP910PC-30 vs EP910PC-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-30 disebabkan oleh Altera dan EP910PC-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910PC-30 EP910PC-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Altera Classic EPLD Altera Classic EPLD
Macrocells 24 24
Usable Gates ~450 900
Pin-to-Pin Propagation Delay (tPD) 30 ns —
Maximum Counter Frequency (fCNT) 33.3 MHz —
Supply Voltage (VCC) 5 V ±10% 4.75 V to 5.25 V (5 V nominal)
Logic Inputs 36 dedicated —
I/O Pins 12 bidirectional —
Logic Array Blocks (LABs) 4 —
Kemasan PDIP-40 (plastic DIP, 0.6 inch) 24-pin PDIP (PDIP-24, 0.300 inch)
Suhu Operasi 0C to +70C (commercial) 0C to +70C (commercial)
Programming Technology UV-erasable EPROM cell —
TTL Emulation 100% TTL-compatible —
Power Dissipation [DATA_NEEDED: power dissipation mW] —
Status RoHS Non-compliant (contains lead, PDIP package) [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS]
Jenis Pemasangan Through-hole DIP Through-Hole
Maximum Pin-to-Pin Delay (tpd) — 15 ns
Counter Frequency (fCNT) — 100 MHz
Supply Current (Icc) — 80 mA typical
Dedicated Inputs — 10
Dedicated I/O Pins — 12
Process Technology — CMOS, UV-erasable
Programming Method — Altera Logic Programmer card
Aras MSL — Not applicable (through-hole)

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