EPC16QC100SS vs EPC16QC100II Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC16QC100SS disebabkan oleh Intel dan EPC16QC100II disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPC16QC100SS - 16Mb Config PROM for FPGAs, PQFP-100 | Intel
EPC16QC100SS ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPC16QC100SS | EPC16QC100II |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | Memory ICs | Memory ICs |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | NRND |
| Jenis Ingatan | In-System Programmable Configuration PROM | FPGA Configuration PROM (Flash-based) |
| Saiz Ingatan | 16 Mb (16,777,216 bits) | — |
| Configuration Interface | Passive Serial / Passive Parallel Synchronous / Passive Parallel Asynchronous | — |
| Operating Modes | FPGA configuration storage, ISP via IEEE 1532 | — |
| Supply Voltage (VCC) | 3.3 V (SS suffix variant) | — |
| I/O Logic Level | 3.3V or 2.5V selectable via VCCSEL | — |
| Suhu Operasi | 0C to +70C (Commercial) | -40C to +85C (Industrial) |
| Kemasan | 100-pin PQFP (Plastic Quad Flat Pack), 20x14 mm | 100-pin PQFP (Plastic Quad Flat Pack) |
| Jenis Pemasangan | Surface Mount | — |
| Compatible FPGAs | Stratix, Stratix II, Cyclone, Cyclone II, APEX 20K, other Altera FPGAs requiring >8 Mbit configuration | — |
| Programmability | In-system programmable (IEEE 1532) | In-System Programmable via IEEE 1149.1 (JTAG) |
| Aras MSL | [DATA_NEEDED: MSL level] | 3 (per JEDEC J-STD-020) |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | Intel (formerly Altera) | — |
| Memory Density | — | 16 Mbit |
| Supported FPGA Families | — | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 8000, Cyclone |
| Configuration Mode | — | FPP / PSA (Fast Passive Parallel / Passive Serial Asynchronous) |
| Cascade Support | — | Yes (multi-PROM cascading supported) |
| Core Supply Voltage | — | 3.3 V |
| I/O Tolerance | — | 5 V tolerant configuration pins |
| Package Dimensions | — | 20 mm x 14 mm, 0.5 mm pitch |
| Lead Finish | — | Matte Tin (lead-free) |
| Configuration Pins | — | DCLK, DATA[0..n], nCONFIG, nSTATUS, CONF_DONE, OE |
| Compression Support | — | Yes (reduces on-PROM footprint vs uncompressed bitstream) |