EPC16QI100N vs EPC16SI16N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC16QI100N disebabkan oleh Altera dan EPC16SI16N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPC16SI16N - 16Mb Enhanced Configuration Device, 16-SOIC | Altera / Intel
EPC16SI16N ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPC16QI100N | EPC16SI16N |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | Memory ICs | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Masa Terakhir Dibeli |
| Saiz Ingatan | 16 Mb | 16 Mb (16,777,216 bits) |
| Jenis Ingatan | Flash (in-system programmable) | Non-volatile flash (enhanced configuration device) |
| Programmable Type | In System Programmable | — |
| Configuration Interface | Serial | — |
| Maximum Configuration Clock | 33 MHz | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V | — |
| Suhu Operasi | -40C to +85C | -40 C to +85 C (industrial, 'SI' suffix) |
| Kemasan / Case | 100-PQFP (20 x 14 mm) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Number of Terminals | 100 | — |
| Package Style | Flatpack / PQFP | — |
| Family Name | EPC16 | — |
| Application | FPGA configuration memory | — |
| Status RoHS | Compliant | Compliant |
| Reprogrammability | Yes, in-system (IEEE 1532) | — |
| Antaramuka | — | Altera enhanced serial configuration (DCLK, DATA, nCS, nRESET, nSTATUS) |
| Programming Interface | — | JTAG (IEEE 1149.1 boundary scan) |
| Maximum Operating Frequency | — | 40 MHz (fast configuration mode) |
| Tegangan Pemberi Arus Operasi | — | 3.3 V (typ) |
| Kemasan | — | 16-pin SOIC (300 mil, 'SI' suffix) |
| Lead-Free / Finish | — | Lead-free (matte tin), 'N' suffix |
| Aras MSL | — | [DATA_NEEDED: MSL level] |
| In-System Programmability | — | Yes (via JTAG, multiple reprogramming cycles) |
| Compatible FPGA Series | — | Altera Stratix II, Stratix III, Cyclone, Cyclone II, Cyclone III |
| Configuration Daisy-Chaining | — | Supported (multiple devices / multiple FPGAs) |
| On-Chip Charge Pump | — | Integrated (no external VPP required) |