EPC1C20 vs EPC2C20 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC1C20 disebabkan oleh Intel dan EPC2C20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPC1C20 | EPC2C20 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Aktif |
| Manufacturer | Intel (formerly Altera) | Altera |
| Product Type | Enhanced Configuration (EPC) Device / Serial Configuration PROM | — |
| Supported Altera Families | APEX II, APEX 20K, Cyclone, ACEX 1K, Mercury, Excalibur | — |
| Configuration Interface | Altera Passive Serial (PS), 4-pin (nSTATUS, nCONFIG, CONF_DONE, DATA, DCLK) | — |
| Supply Voltage (VCCINT) | 5.0 V nominal | — |
| I/O Voltage (VCCIO) | 3.3 V or 5.0 V | — |
| Programming Interface | JTAG (IEEE Std 1149.1) in-system programming | — |
| Memory Cell Technology | CMOS EPROM (non-volatile, one-time or reprogrammable) | — |
| Configuration Bit Capacity | [DATA_NEEDED: configuration bit capacity in Mb] | — |
| Gambaran Suhu Operasi | -40 C to +85 C (industrial) [DATA_NEEDED: confirm exact grade] | [DATA_NEEDED: operating temperature range] |
| Kemasan | 20-pin PLCC (J-lead) | [DATA_NEEDED: package] |
| Jenis Pemasangan | Surface Mount (PLCC socket compatible for through-hole prototyping) | — |
| Status RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Lead-Free / Halogen-Free | unknown | — |
| Status Lingkungan Hidup | Obsolete (NRND by Altera; supported stock only) | — |
| Configuration Clock Source | Target FPGA supplies DCLK (EPC is slave) | — |
| In-System Programmability | Yes (via JTAG) | — |
| MPN | — | EPC2C20 |
| Device Type | — | Configuration device integrated circuit |
| Primary Function | — | Configuration of SRAM-based lookup-table devices |
| Configuration Architecture | — | Single-device configuration solution |
| Architecture Block 1 | — | Configuration controller |
| Architecture Block 2 | — | Flash memory |
| Memory Technology | — | Flash memory |
| Supported Device Class | — | SRAM-based LUT devices |
| Configuration Mode | — | [DATA_NEEDED: configuration mode] |
| Memory Density | — | [DATA_NEEDED: memory density] |
| Configuration Data Interface | — | [DATA_NEEDED: configuration data interface] |
| Operating Voltage | — | [DATA_NEEDED: operating voltage] |
| Configuration Clock Frequency | — | [DATA_NEEDED: configuration clock frequency] |
| Kiraan Pin | — | [DATA_NEEDED: pin count] |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |