EPC2T132N vs EPC2TC32N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC2T132N disebabkan oleh Altera dan EPC2TC32N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPC2T132N | EPC2TC32N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | Memory ICs |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Jenis Ingatan | Flash (NOR, serial configuration) | Flash Configuration PROM |
| Memory Capacity | 1.6 Mbit (2 Mbit raw, 1.6 Mbit usable) | — |
| Serial Clock Frequency | 10 MHz maximum | — |
| Antaramuka | Altera serial configuration (4-wire JTAG for ISP) | JTAG (IEEE 1149.1) + serial/parallel |
| Tegangan Pemberi Arus | 3.0 V to 3.6 V | — |
| Suhu Operasi | -40C to +85C (industrial) | 0 °C to +70 °C (Commercial) |
| Kemasan | TQFP-32 (T132) | 32-TQFP (7x7 mm) |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Program/Erase Endurance | 100,000 cycles per sector | — |
| Data Retention | 20 years minimum | — |
| In-System Programmable | Yes (IEEE 1149.1 JTAG) | — |
| Configuration Compatibility | APEX II, APEX 20K, ACEX 1K, FLEX 10K/10KE/6000, Cyclone, Stratix, Mercury | — |
| Multi-Device Daisy Chain | Yes (supported) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | — | Altera (now Intel) |
| Saiz Ingatan | — | 1.6 Mbit |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage - VCCINT | — | 3.0 V to 3.6 V or 4.75 V to 5.25 V |
| Supply Voltage - VCCIO | — | 3.0 V to 3.6 V or 4.75 V to 5.25 V |
| Max Configuration Clock | — | 8 MHz |
| Supported FPGA Families | — | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Daisy-Chain Support | — | Yes (multi-FPGA cascade) |
| JTAG Compliance | — | IEEE 1149.1 |
| Configuration Mode | — | Serial (AS) or Parallel (PS/AP) |