EPC4QI100N vs EPC4QI1OON Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC4QI100N disebabkan oleh Altera dan EPC4QI1OON disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPC4QI1OON - Altera Enhanced Configuration PROM 4Mb | 100-PQFP
EPC4QI1OON ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPC4QI100N | EPC4QI1OON |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | Memory ICs | Memory ICs |
| Status Lingkungan Hidup | Aktif | Masa Terakhir Dibeli |
| Harga Unit (USD) | $10.40 | — |
| Jenis Ingatan | In-System Programmable Configuration PROM (NOR flash) | — |
| Saiz Ingatan | 4 Mbit (4,194,304 bits) | 4 Mbit |
| Programmable Type | In System Programmable (ISP via JTAG) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| Antaramuka | Altera serial (x1) configuration + JTAG | Altera Enhanced Configuration (parallel-style) |
| Configuration Clock DCLK | [DATA_NEEDED: DCLK maximum frequency] | — |
| Active Supply Current (ICC active) | [DATA_NEEDED: ICC active typical value] | — |
| Standby Supply Current | [DATA_NEEDED: ICC standby typical value] | — |
| Suhu Operasi | -40C to +85C (industrial) | -40C to +85C (Industrial) |
| Storage Temperature | -65C to +150C | — |
| Kemasan | 100-pin PQFP (PowerPQFP, 20x14 mm) | 100-pin PQFP (20 x 14 mm) |
| Package Code | QI100 (PQFP-100, industrial) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Aras MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | Compliant (verify per lot) |
| JTAG Standard | IEEE 1149.1 boundary-scan / ISP | — |
| Cascading | Supported (multi-device daisy chain) | — |
| Target FPGAs | Altera Cyclone, Cyclone II, Stratix series | — |
| Manufacturer | — | Altera (now Intel) |
| Device Type | — | Enhanced Configuration PROM (Parallel Interface) |
| Memory Width | — | 16-bit |
| Tegangan Pemberi Arus | — | 3.3 V |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Compatible FPGA Families | — | Stratix, Cyclone, APEX, Mercury, Excalibur |
| Configuration Mode | — | Master/slave via JTAG or EPC controller |
| Lead-Free | — | Yes |