EPF10K50EQC240-2N vs EPF10K50EQC240-1N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPF10K50EQC240-2N disebabkan oleh Intel dan EPF10K50EQC240-1N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPF10K50EQC240-2N - FLEX 10KE FPGA 50K Gates 240-PQFP | Intel / Altera
EPF10K50EQC240-2N ObsoleteAltera
EPF10K50EQC240-1N - FLEX 10KE FPGA 50K Gates 2880 Cells 240-PQFP | Altera
EPF10K50EQC240-1N ObsoletePengandingan Spesifikasi
| Parametr | EPF10K50EQC240-2N | EPF10K50EQC240-1N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements (LEs) | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | — |
| Typical Gates | 50,000 | — |
| Embedded SRAM | 40,960 bits (5,120 bytes) | — |
| Embedded Array Blocks (EABs) | 4 | — |
| Maximum User I/Os | 189 | — |
| Kemasan | 240-pin PQFP / BFQFP | 240-pin PQFP / BFQFP |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Internal Supply Voltage (VCCINT) | 2.5 V | — |
| Internal Performance | 200 MHz | — |
| Propagation Delay | 0.6 ns | 0.5 ns |
| Suhu Operasi | 0 °C to +70 °C (commercial) | 0 °C to +85 °C (Commercial) |
| Configuration Method | JTAG / external EPC PROM / intelligent controller | — |
| I/O Standards Supported | PCI, LVTTL, LVCMOS (5.0 V / 3.3 V / 2.5 V) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount (PQFP) |
| Status RoHS | [DATA_NEEDED: RoHS status - older FLEX 10KE part, likely non-compliant] | [DATA_NEEDED: RoHS status] |
| PCI Compliance | PCI-SIG compliant | — |
| Logic Elements / Cells | — | 2880 |
| Total RAM Bits | — | 40960 |
| Number of Logic Gates | — | 50K |
| Number of LABs/CLBs | — | 360 LABs |
| Number of I/O | — | 189 |
| Supply Voltage (Core) | — | 2.5 V |
| Supply Voltage (I/O MultiVolt) | — | 2.5 V / 3.3 V / 5 V |
| Maximum Internal Frequency | — | 250 MHz |
| Configuration Mode | — | Passive Serial (PS), JTAG |
| JTAG Boundary Scan | — | IEEE 1149.1 compliant |
| Lead Free | — | [DATA_NEEDED: lead-free status] |