EPF6024AQI208-1 vs EPF6024AQI208-2N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPF6024AQI208-1 disebabkan oleh Altera dan EPF6024AQI208-2N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPF6024AQI208-1 - 24K Gate FLEX 6000 PLD, 208-PQFP, 172 MHz | Altera
EPF6024AQI208-1 ObsoletePengandingan Spesifikasi
| Parametr | EPF6024AQI208-1 | EPF6024AQI208-2N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | FLEX 6000 | FLEX 6000 |
| Device Type | Programmable Logic Device (PLD) | SRAM-based FPGA (loadable PLD) |
| Typical Gates | 24,000 | 24,000 |
| Logic Elements | 1,960 LEs (estimated from family datasheet) | 1,960 |
| Frekuensi Klock Maksimum | 172 MHz | 153 MHz |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| I/O Voltage Standard | 3.3 V LVTTL / LVCMOS | — |
| 5 V Tolerant Inputs | Yes | — |
| Kemasan | 208-pin PQFP (FQFP, gull-wing) | 208-pin PQFP (Plastic Quad Flat Pack), 0.5 mm pitch |
| Bilangan Pin | 208 | — |
| Suhu Operasi | -40C to +85C (industrial) | — |
| Configuration Method | SRAM (volatile), serial or JTAG | Passive Serial (PS) / Passive Parallel Async (PPA) |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE 1149.1 boundary-scan (ISP) |
| Process Technology | CMOS, 0.42 um 4-metal layer | CMOS, SRAM configuration |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Maximum User I/O | — | 171 |
| Dedicated Inputs | — | 4 |
| JEDEC Package Code | — | S-PQFP-G208 |
| Terminal Form | — | Gull-wing |
| Core Supply Voltage | — | 3.3 V |
| Operating Temperature Grade | — | Industrial |
| Aras MSL | — | [DATA_NEEDED: MSL rating] |