EPM240T100C5 vs EPM240GT100I5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM240T100C5 disebabkan oleh Altera dan EPM240GT100I5N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM240T100C5 | EPM240GT100I5N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Status Stok | In Stock | — |
| Harga Unit (USD) | $4.92 | — |
| Family | MAX II | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Maximum User I/O Pins | 80 | — |
| Logic Elements | 240 | — |
| Non-volatile Memory | 8 Kbits (embedded Flash) | — |
| Pin-to-Pin Logic Delay (tPD1) | 4.7 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Process Technology | 0.18 µm, 6-layer metal Flash | 0.18 µm 6-layer-metal Flash CMOS |
| Core Supply Voltage | 2.5 V / 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) | — |
| I/O Banks | 4 | — |
| Kemasan | 100-pin TQFP (14 mm × 14 mm × 1 mm) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) ISP |
| Suhu Operasi | 0C to +85C (Commercial) | -40 °C to +100 °C (Industrial) |
| Chip-wide Output Enable | DEV_OE pin | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 4.7 ns |
| Internal Performance (fMAX) | — | 304 MHz |
| Embedded Non-Volatile Memory | — | 8 Kbits user Flash |
| Supply Voltage - Core (VCCINT) | — | 1.71 V to 1.89 V (3.3 V tolerant for MAX II G variant) |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt I/O |
| Lead-Free / RoHS | — | Yes (suffix N) |
| Jenis Pemasangan | — | Surface Mount |