EPM3032ATC44-10NAA vs EPM3032ATC44-10NAB Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3032ATC44-10NAA disebabkan oleh Altera dan EPM3032ATC44-10NAB disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM3032ATC44-10NAA - 32-Macrocell MAX 3000A CPLD, 44-TQFP | Altera
EPM3032ATC44-10NAA ObsoleteIntel
EPM3032ATC44-10NAB - 32-Macrocell CPLD, 10ns, 3.3V | Intel (Altera)
EPM3032ATC44-10NAB ObsoletePengandingan Spesifikasi
| Parametr | EPM3032ATC44-10NAA | EPM3032ATC44-10NAB |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 3000A | — |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Number of Macrocells | 32 | — |
| Number of Logic Array Blocks (LABs) | 2 | — |
| Usable Gates | 600 | 600 |
| Number of User I/O Pins | 34 | — |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Internal Frequency | [DATA_NEEDED: fmax spec] | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Logic Levels Supported | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Programming Technology | CMOS EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1149.1 JTAG + IEEE Std. 1532 | — |
| Hot-Socketing Support | Yes | Yes |
| Kemasan | 44-pin TQFP | 44-pin TQFP |
| Gambaran Suhu Operasi | [DATA_NEEDED: operating temperature] | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant (per -NAB suffix convention) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Product Family | — | MAX 3000A |
| Logic Elements / Macrocells | — | 32 macrocells |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | 103.1 MHz (per Arrow listing) |
| Number of User I/O | — | 34 (max for 44-pin TQFP package) |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) |
| Configuration Memory | — | Non-volatile EEPROM |
| Suhu Operasi | — | [DATA_NEEDED: operating temperature range] |
| Delivery Form | — | Tray ('AB' suffix per Altera order code convention) |
| Process Technology | — | CMOS, EEPROM-based |