EPM3064ATC100-10NA vs EPM3064ATC100-10N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3064ATC100-10NA disebabkan oleh Intel dan EPM3064ATC100-10N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPM3064ATC100-10NA - MAX 3000A CPLD, 64 Macrocells, 10ns, TQFP-100 | Intel (Altera)
EPM3064ATC100-10NA ✓ AktifPengandingan Spesifikasi
| Parametr | EPM3064ATC100-10NA | EPM3064ATC100-10N |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | 64 |
| User I/Os | 66 | — |
| Usable Gates | 1,250 | 1,250 |
| Logic Array Blocks (LABs) | 4 | 2 |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Maximum Operating Frequency | [DATA_NEEDED: fMAX in MHz] | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V (3.0 V to 3.6 V) |
| MultiVolt I/O Voltages | 2.5 V / 3.3 V / 5.0 V | — |
| Kemasan | TQFP-100 (0.5 mm pitch) | 100-pin TQFP |
| Configuration Memory | Non-volatile EEPROM | Non-volatile EEPROM |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) | — |
| Suhu Operasi | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Lead-Free / RoHS | Yes (NA suffix) | — |
| Maximum User I/O Pins | — | 66 |
| In-System Programmability | — | Yes - IEEE Std. 1149.1 JTAG, IEEE Std. 1532 |
| Boundary-Scan Test (BST) | — | Yes - JTAG compliant |
| Program/Erase Cycles | — | 100 minimum |
| MultiVolt I/O | — | Yes - 1.8 V / 2.5 V / 3.3 V / 5 V tolerant |
| Jenis Pemasangan | — | Surface Mount |
| Status RoHS | — | Compliant (lead-free) |