EPM3128ATC144-5N vs EPM3128ATC144-5 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3128ATC144-5N disebabkan oleh Altera dan EPM3128ATC144-5 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM3128ATC144-5N EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N - MAX 3000A 128-Macro 5ns CPLD | Altera

EPM3128ATC144-5N ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM3128ATC144-5N EPM3128ATC144-5
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD - Complex Programmable Logic Device CPLD (Complex Programmable Logic Device)
Logic Family CMOS CMOS
Macrocells 128 —
Usable Gates 2500 —
User I/O 96 —
Pin-to-Pin Logic Delay 5 ns —
Counter Frequency up to 227.3 MHz —
Supply Voltage (Core) 3.3 V 3.3 V
I/O Logic Levels Supported 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
In-System Programmability Yes (3.3-V via JTAG) Yes (IEEE Std. 1532 compliant)
JTAG Boundary Scan IEEE Std 1149.1 compliant —
Kemasan 144-pin TQFP (20x20 mm) TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm)
Suhu Operasi 0C to 70C (Commercial) 0C to +70C (Commercial)
Status RoHS Compliant (lead-free) Not Compliant (per Arrow distributor listing)
Jenis Pemasangan Surface Mount —
Number of Macrocells — 128
Number of Logic Array Blocks (LABs) — 8
Number of User I/Os — 96
Device System Gates — 2500
Product Terms per Macrocell — 32
Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency — 192.3 MHz
Number of Global Clocks — 2
Program Memory Type — EEPROM (non-volatile)
Multi-Volt I/O Voltage — 2.5 V / 3.3 V / 5.0 V tolerant
JTAG / IEEE 1149.1 — Yes (boundary-scan + ISP)
Process Technology — 0.30 um CMOS EEPROM, 4 metal layers
ECCN — EAR99
HTS Code — 8542.31.00.55

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