EPM3512AFC256-10 vs EPM3256AFC256-10 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AFC256-10 disebabkan oleh Altera dan EPM3256AFC256-10 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM3256AFC256-10 - 256-Macro CPLD MAX 3000A | Intel / Altera | FBGA-256
EPM3256AFC256-10 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPM3512AFC256-10 | EPM3256AFC256-10 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Masa Terakhir Dibeli |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | — |
| Logic Array Blocks (LABs) | 16 | 16 (16 macrocells each) |
| Usable Gates | 10,000 | 5,000 |
| Maximum I/O Pins | 208 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 87 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Voltage Tolerance | 5-V tolerant | 5.0 V tolerant |
| Programmable Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) | Yes (3.3 V ISP via JTAG IEEE 1149.1) |
| Kemasan | 256-pin FBGA | 256-ball FBGA (Fine-Line BGA) |
| Gambaran Suhu Operasi | [DATA_NEEDED: industrial/commercial operating temperature range] | — |
| Kiraan Pin | 256 | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| Architecture | MAX (Multiple Array matriX) EEPROM-based | — |
| Logic Family | — | CMOS (EEPROM-based) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 256 |
| Maximum User I/Os | — | 161 |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Counter Frequency (fCNT) | — | 95.2 MHz |
| Suhu Operasi | — | 0°C to +70°C (Commercial) |
| Pitch | — | [DATA_NEEDED: BGA ball pitch] |