EPM3512AFC256-20 vs EPM3512AFC256-2 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AFC256-20 disebabkan oleh Altera dan EPM3512AFC256-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM3512AFC256-20 EPM3512AFC256-2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 3000A MAX 3000A
Macrocells 512 512
Typical Usable Gates 10,000 —
Speed Grade -20 (20 ns tPD) -2
Kemasan 256-ball FBGA (Fine-pitch BGA) BGA-256 (FineLine BGA)
Kiraan Pin 256 —
Operating Voltage (VCCINT) 3.3 V (3.0 V to 3.6 V) —
I/O Voltage (VCCIO) 2.5 V or 3.3 V (5.0 V tolerant inputs) —
I/O Standards LVTTL, LVCMOS, 2.5 V, 3.3 V, 5.0 V tolerant —
Program Memory Type EEPROM (non-volatile) —
In-System Programmability Yes (JTAG IEEE 1149.1) —
JTAG Support Yes (boundary-scan + ISP) —
Jenis Pemasangan Surface Mount —
Suhu Operasi [DATA_NEEDED: operating temperature range] 0C to +70C (commercial)
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Aras MSL [DATA_NEEDED: MSL moisture sensitivity level] —
Configuration Memory Internal EEPROM —
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 212
Propagation Delay (tPD, -2 grade) — [DATA_NEEDED: tPD ns]
Maximum Operating Frequency — [DATA_NEEDED: fMAX MHz]
Core Supply Voltage — 3.3 V
I/O Output Drive Voltage — 2.5 V or 3.3 V (MultiVolt)
Input Tolerance — 2.5 V, 3.3 V, 5.0 V tolerant
Ball Pitch — 1.0 mm
Programming Interface — JTAG (IEEE Std 1149.1) / ByteBlaster
Process Technology — 0.30 um CMOS EEPROM

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga