EPM5192AJM84-15 vs EPM5192AJC84-15 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192AJM84-15 disebabkan oleh Altera dan EPM5192AJC84-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM5192AJC84-15 - MAX 5000 CPLD, 192 Macrocells, 84-pin PLCC | Altera
EPM5192AJC84-15 ObsoletePengandingan Spesifikasi
| Parametr | EPM5192AJM84-15 | EPM5192AJC84-15 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Device Type | UV Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| User I/O Pins | 84 | — |
| Speed Grade | -15 (15 ns tPD) | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 83.3 MHz | — |
| Process Technology | 5 V CMOS, UV-EPROM | CMOS EPROM |
| Kemasan | 84-pin ceramic J-lead (JM84) | 84-pin PLCC (J84C) windowed ceramic |
| Jenis Pemasangan | Surface Mount (ceramic J-lead) | Surface Mount |
| Gambaran Suhu Operasi | -55C to +125C (military grade) | — |
| Tegangan Pemberi Arus | [DATA_NEEDED: VCC range] | — |
| Erase Method | Ultraviolet (windowed ceramic package) | — |
| Programming Method | EPROM-style (programmer + UV erase) | UV-erase + EPROM programming (windowed package) |
| I/O Standard | TTL-compatible CMOS | — |
| Development Tool | Altera MAX+PLUS II | — |
| Status RoHS | Non-compliant (ceramic with UV window) | Non-compliant (contains Pb, ceramic windowed package) |
| Status Lingkungan Hidup | Obsolete (EOL by Altera, now supported by Microchip / 3rd-party distributors) | — |
| Propagation Delay (tpd) | — | 15 ns |
| Maximum Clock Frequency (fMAX) | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Technology | — | CMOS, UV-erasable EPROM |
| Suhu Operasi | — | [DATA_NEEDED: commercial/industrial/military grade] |
| Logic Blocks | — | 16 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |