EPM5192C-2 vs EPM5192GC1 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192C-2 disebabkan oleh Altera dan EPM5192GC1 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5192C-2 | EPM5192GC1 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | Complex Programmable Logic Device (CPLD) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 192 | — |
| User I/O Pins | 64 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Dedicated Inputs | 7 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (PIA, typical) | 45 ns | — |
| Maximum Operating Frequency | 50 MHz | 62.5 MHz |
| Process Technology | CMOS | EPROM-based CMOS |
| Configuration Memory | EEPROM (non-volatile) | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA) | — |
| Speed Grade | -2 | — |
| Programming Interface | JTAG / Altera MAX+ programming | — |
| Status RoHS | unknown | unknown |
| Lead-Free | unknown | — |
| Macro Cells | — | 192 |
| Usable Gates | — | 3,750 |
| Supply Voltage (VCC) | — | 5 V |
| Programming Technology | — | UV-Erasable / OTP EPROM |
| Package Type | — | Ceramic PGA (Pin Grid Array) |
| Logic Elements | — | 192 macrocells with AND/OR array |
| Suhu Operasi | — | [DATA_NEEDED: operating temperature range] |
| Propagation Delay | — | [DATA_NEEDED: tpd specification] |
| Bilangan Pin | — | [DATA_NEEDED: pin count for GC1 PGA package] |
| Jenis Pemasangan | — | Through-hole (PGA) |
| Development Tool | — | Altera MAX+PLUS II |