EPM5192GC-2 vs EPM5192C-2 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192GC-2 disebabkan oleh Altera dan EPM5192C-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5192GC-2 | EPM5192C-2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Array Blocks | 16 (LABs of 16 macrocells each) | — |
| Usable I/O Pins | [DATA_NEEDED: exact user I/O count for PGA package] | — |
| Propagation Delay (tPD) | 12 ns typical (-2 grade) | — |
| Counter Frequency | 100 MHz minimum | — |
| Supply Voltage (VCC) | 5 V nominal | — |
| Technology | CMOS EPROM | — |
| Programmable Technology | UV-erasable / one-time programmable | — |
| Programming Toolchain | Altera MAX+PLUS II | — |
| Package Type | Pin Grid Array (PGA), ceramic | — |
| Suhu Operasi | Commercial (0C to +70C) | — |
| Speed Grade | -2 | -2 |
| Status RoHS | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) | unknown |
| Jenis Pemasangan | Through-hole (PGA socket) | — |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| User I/O Pins | — | 64 |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (PIA, typical) | — | 45 ns |
| Maximum Operating Frequency | — | 50 MHz |
| Process Technology | — | CMOS |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Programming Interface | — | JTAG / Altera MAX+ programming |
| Lead-Free | — | unknown |