EPM5192GC1 vs EPM5192GI84 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192GC1 disebabkan oleh Altera dan EPM5192GI84 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192GC1 EPM5192GI84
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) UV-Erasable / OTP Complex PLD (CPLD)
Macro Cells 192 —
Usable Gates 3,750 —
Maximum Operating Frequency 62.5 MHz —
Supply Voltage (VCC) 5 V —
Programming Technology UV-Erasable / OTP EPROM —
Package Type Ceramic PGA (Pin Grid Array) —
Logic Elements 192 macrocells with AND/OR array —
Process Technology EPROM-based CMOS —
Suhu Operasi [DATA_NEEDED: operating temperature range] —
Propagation Delay [DATA_NEEDED: tpd specification] [DATA_NEEDED: tPD in ns]
Bilangan Pin [DATA_NEEDED: pin count for GC1 PGA package] —
Jenis Pemasangan Through-hole (PGA) Through-Hole (PGA socket or PCB pin/peg)
Status RoHS unknown [DATA_NEEDED: most legacy PGA parts are non-RoHS]
Development Tool Altera MAX+PLUS II —
Macrocells — 192
Logic Array Blocks — [DATA_NEEDED: number of LABs]
Kemasan — 84-pin PGA (WPGA, square, through-hole, pin/peg terminals)
Package Code — WPGA
Operating Voltage (VCC) — 5 V (typical)
I/O Logic Compatibility — TTL
Temperature Grade — Industrial
Programmable Flip-Flop Modes — D, T, JK, SR
Programmability — UV-erasable (windowed) / OTP
Programming File Format — JEDEC map via MAX+PLUS II / A+PLUS
Max User I/O Pins — [DATA_NEEDED: usable I/O count for this package]
Gambaran Suhu Operasi — -40 C to +85 C (industrial)
Lead-Free — [DATA_NEEDED: legacy part, likely contains lead]
Number of Terminals — 84
Terminal Form — PIN/PEG
Package Shape — SQUARE

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