EPM5192GC84-1 vs EPM5192AGC84-20 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192GC84-1 disebabkan oleh Altera dan EPM5192AGC84-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5192GC84-1 | EPM5192AGC84-20 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Product Type | UV-Erasable/OTP Complex PLD (CPLD) | Complex Programmable Logic Device (CPLD) |
| Technology | CMOS (EPROM-cell based) | — |
| Macrocells | 192 | 192 |
| Propagation Delay (tPD) | 40 ns (speed grade -1) | — |
| Frekuensi Klock Maksimum | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Total Inputs / Outputs | 72 inputs / 64 outputs | — |
| Architecture | Shared input/clock and shared product terms | — |
| Kemasan | 84-pin PGA (Pin Grid Array), WPGA code | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| Temperature Grade | Commercial | — |
| Jenis Pemasangan | Through-hole (PGA socket) | Through-Hole (Pin Grid Array socket) |
| Status RoHS | Compliant (per third-party distributor listing) | [DATA_NEEDED: RoHS compliance] |
| Programming Method | UV erasure (quartz window) + EPROM programmer | — |
| Logic Element Type | Macrocells with AND/OR array | — |
| Logic Gates (typical) | — | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | — | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Package Code | — | WPGA |
| Erasure Method | — | UV-Erasable (with OTP window) |
| Process Technology | — | CMOS |
| Operating Temperature Grade | — | Commercial |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: VCC range] |
| I/O Standard | — | 5V CMOS / TTL compatible |