EPM5192JI-2 vs EPM5192GC-2 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192JI-2 disebabkan oleh Altera dan EPM5192GC-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5192JI-2 | EPM5192GC-2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 5000 | — |
| Dedicated Inputs | 12 | — |
| Flip-Flops | 192 | — |
| Speed Grade | -2 | -2 |
| Kemasan | JLCC-68 (J-Lead Ceramic) | — |
| Suhu Operasi | 0C to +70C (commercial) | Commercial (0C to +70C) |
| Programming Technology | UV-Erasable EPROM | — |
| Architecture | Sum-of-products with Programmable Interconnect Array (PIA) | — |
| Tegangan Pemberi Arus | 5 V (typical) | — |
| Process Technology | CMOS EPROM | — |
| Jenis Pemasangan | Surface Mount | Through-hole (PGA socket) |
| Status RoHS | Non-compliant (ceramic JLCC, contains lead) | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) |
| Status Lingkungan Hidup | Obsolete (legacy Altera MAX 5000 family) | — |
| Logic Array Blocks | — | 16 (LABs of 16 macrocells each) |
| Usable I/O Pins | — | [DATA_NEEDED: exact user I/O count for PGA package] |
| Propagation Delay (tPD) | — | 12 ns typical (-2 grade) |
| Counter Frequency | — | 100 MHz minimum |
| Supply Voltage (VCC) | — | 5 V nominal |
| Technology | — | CMOS EPROM |
| Programmable Technology | — | UV-erasable / one-time programmable |
| Programming Toolchain | — | Altera MAX+PLUS II |
| Package Type | — | Pin Grid Array (PGA), ceramic |