EPM570GT100C5N vs EPM570T10015 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM570GT100C5N disebabkan oleh Intel dan EPM570T10015 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM570GT100C5N EPM570T10015
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Series MAX II —
Logic Elements 570 570
Equivalent Macrocells 440 —
User I/O 76 —
LABs 36 —
Maximum Frequency 304 MHz —
Pin-to-Pin Delay [DATA_NEEDED: tPD value] —
User Flash Memory (UFM) 8 Kbit —
Operating Supply Voltage (VCCINT) 2.5 V / 3.3 V —
I/O Standards Supported 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS —
Kemasan TQFP-100 TQFP-100 (T100) 14 x 14 mm
Jenis Pemasangan Surface Mount —
Suhu Operasi 0C to +85C (Commercial) —
Programmability Flash-based, non-volatile (ISP via JTAG) —
JTAG Support IEEE 1149.1 boundary scan —
Status RoHS Compliant [DATA_NEEDED: RoHS compliance status]
Device Family — MAX II
Macro Cells — 440
User Flash Memory — 8 Kbits
Maximum User I/O Pins — 76
Pin-to-Pin Delay (tPD) — 15 ns (commercial/industrial speed grade)
Propagation Delay — [DATA_NEEDED: detailed tPD/tCO/tSU datasheet values]
Supply Voltage - Core (VCCINT) — 3.3 V (2.5 V variants exist in MAX II family)
Supply Voltage - I/O (VCCIO) — 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-volt I/O)
Gambaran Suhu Operasi — -40 °C to +85 °C (industrial)
Configuration Memory — On-chip flash (non-volatile, instant-on)
Programming Interface — JTAG (IEEE 1149.1 / IEEE Std 1532)
Supported I/O Standards — LVTTL, LVCMOS, PCI, SSTL (per pin)
Process Technology — 0.18 µm
Aras MSL — [DATA_NEEDED: moisture sensitivity level]

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