EPM570GT100I5 vs EPM570GT100I5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM570GT100I5 disebabkan oleh Altera dan EPM570GT100I5N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM570GT100I5 | EPM570GT100I5N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Series | MAX II | — |
| Logic Elements (LE) | 570 | — |
| Macrocells | 440 | — |
| Maximum User I/O Pins | 76 | — |
| Propagation Delay (tPD) | 5.4 ns (typ) | — |
| Internal Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| User I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| User Flash Memory | 8 Kbits | 8 Kbit |
| Programmability | In-System Programmable (ISP) via JTAG, non-volatile flash | — |
| Configuration Time | Instant-On (< 1 ms, no external PROM required) | — |
| Suhu Operasi | -40 C to +100 C (Industrial, "I5") | -40 °C to +100 °C (Industrial) |
| Kemasan | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | 100-pin TQFP (GT100) |
| Jenis Pemasangan | Surface Mount (Gull-wing leads) | Surface Mount (SMD/SMT) |
| Typical Active Current | [DATA_NEEDED: typical active ICC] | — |
| Speed Grade | GT (fast) | — |
| Status RoHS | Compliant | Compliant |
| JTAG Support | IEEE 1149.1 boundary scan | Yes (IEEE 1149.1 boundary-scan) |
| Global Clock Networks | 4 | — |
| Family | — | MAX II |
| Logic Elements | — | 570 LE |
| Equivalent Macrocells | — | 440 macrocells |
| Number of LABs | — | 57 |
| User I/Os | — | 76 |
| Maximum Operating Frequency | — | 304 MHz |
| Propagation Delay (tPD1) | — | 5.4 ns |
| Operating Supply Voltage (Core) | — | 1.8 V |
| Process | — | 0.18 µm, 6-layer-metal flash |
| MultiVolt I/O Support | — | 1.8 V / 2.5 V / 3.3 V |
| Internal Oscillator | — | Yes |
| Non-volatile Configuration | — | Yes (instant-on, no external boot PROM) |