EPM570ZM256C6N vs EPM570ZM256C7N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM570ZM256C6N disebabkan oleh Altera dan EPM570ZM256C7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM570ZM256C6N EPM570ZM256C7N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Series MAX II MAX II Z
Logic Elements (LEs) 570 —
Macrocells 440 —
User I/Os 160 76
User Flash Memory 8 Kbits 8 Kbits
Kemasan 256-MBGA (FineLine BGA) 11x11 mm 256-ball MBGA (Micro FBGA), 0.5 mm pitch, 6 × 6 mm
Pin/Pitch 256 balls, 0.5 mm pitch (Heisener description) —
Internal Core Voltage 1.71 V to 1.89 V (1.8 V typical) —
I/O Voltage Standards 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant —
Propagation Delay (tPD) 9 ns (per Heisener listing for Z speed grade) —
Programmable Type In System Programmable (Flash, non-volatile) —
Suhu Operasi 0C to +85C (commercial) 0 °C to +85 °C (commercial)
Jenis Pemasangan Surface Mount (BGA) —
Process Technology 0.18 micron CMOS, 6-layer-metal flash 0.18 µm CMOS
Status RoHS Lead-free (per Heisener listing) —
Family — MAX II
Logic Elements (LE) — 570
Macro Cells — 440
Maximum Operating Frequency — 123.5 MHz
Pin-to-Pin Delay (tPD) — 5.0 ns
Core Supply Voltage — 1.71 V to 1.89 V (3.3 V with on-chip regulator)
I/O Supply Voltages — 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt)
Configuration Method — On-chip non-volatile (instant-on, ISP via JTAG)
JTAG Support — IEEE Std 1149.1 boundary-scan + ISP
Lead-Free / RoHS — Lead-free / RoHS compliant
Logic Family — CMOS

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga