EPM7128SQC100-7F vs EPM7128SQC100-10 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7128SQC100-7F disebabkan oleh Altera dan EPM7128SQC100-10 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM7128SQC100-7F | EPM7128SQC100-10 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 7000S | MAX 7000S |
| Logic Elements / Blocks | 8 LABs | — |
| Number of Macrocells | 128 | — |
| Number of Usable Gates | 2,500 | — |
| Maximum Operating Frequency | 125 MHz | 100 MHz |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Number of User I/O | 84 | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| Programmable Type | In-System Programmable (ISP), EEPROM | — |
| JTAG Boundary-Scan | Yes (IEEE 1149.1 BST) | — |
| Open-Drain Output Option | Yes | — |
| Suhu Operasi | 0 °C to 70 °C (Commercial) | 0C to +70C (commercial) |
| Kemasan | 100-pin PQFP (SQC100), surface-mount | 100-pin PQFP (Plastic Quad Flat Pack) |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Lead-Free (Pb-Free) | Yes (matte-tin, '-F' suffix) | — |
| Status RoHS | [DATA_NEEDED: confirmed from manufacturer] | [DATA_NEEDED: rohs_status] |
| Jenis Ingatan | Non-volatile (EEPROM configuration) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 128 |
| Logic Elements / Gates | — | 2,500 usable gates |
| Maximum User I/O | — | 84 |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Tegangan Pemberi Arus | — | 5 V |
| Process Technology | — | 5V CMOS, EEPROM-based |
| Programmability | — | In-System Programmable (ISP) via JTAG |