EPM7256SQC208-15N vs EPM7256AQC208-7 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7256SQC208-15N disebabkan oleh Altera dan EPM7256AQC208-7 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM7256SQC208-15N EPM7256AQC208-7
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete NRND
Series MAX 7000S —
Macrocells 256 256
User I/O Pins 164 —
Pin-to-Pin Delay 15 ns (speed grade -15) —
Tegangan Pemberi Arus 5 V —
Kemasan 208-pin PQFP 208-Pin PQFP (28 x 28 mm)
Jenis Pemasangan Surface Mount Surface Mount
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile)
JTAG Interface IEEE 1149.1 boundary-scan IEEE 1149.1 (JTAG) boundary scan
In-System Programmability Yes (ISP) —
Suhu Operasi [DATA_NEEDED: operating temperature range] —
Status RoHS Lead free / RoHS Compliant [DATA_NEEDED: RoHS status]
Logic Array Blocks 16 macrocells per LAB —
Interconnect Programmable Interconnect Array (PIA) —
Speed Grade -15 -7
Product Category CPLD - Complex Programmable Logic Devices —
Manufacturer Altera (Intel Programmable Solutions Group) —
Family — MAX 7000A
Programmable Type — In System Programmable (ISP), EEPROM-based
Usable Gates — 5,000
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 164
Pin-to-Pin Logic Delay (tPD) — 7 ns
Maximum Counter Frequency — 125 MHz
Internal Toggle Frequency — 227.3 MHz
Supply Voltage - Internal — 3.0 V to 3.6 V
I/O Voltage Compatibility — 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O)
Supplier Device Package — 208-PQFP (28x28)
Gambaran Suhu Operasi — 0C to +70C (commercial)
Aras MSL — [DATA_NEEDED: MSL level]

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