EPM9480RC208-15N vs EPM9480RC208-15 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9480RC208-15N disebabkan oleh Altera dan EPM9480RC208-15 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM9480RC208-15N | EPM9480RC208-15 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 10,000 | 10,000 gates |
| Macro Cells | 480 | — |
| Maximum Frequency | 117.6 MHz | — |
| Propagation Delay | 15 ns (speed grade -15) | — |
| Tegangan Pemberi Arus | 5.0 V | 5.0 V |
| Kemasan | 208-pin RQFP | RQFP-208 |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmability | Yes (ISP via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | -40C to +85C (commercial) |
| Status RoHS | ROHS3 Compliant | [DATA_NEEDED: RoHS compliance status] |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Manufacturer Standard Lead Time | 1-7 Days | — |
| Architecture | Multiple Array MatriX (MAX) third-generation | Multiple Array MatriX (MAX) - 3rd generation |
| Logic Cells / Macro Cells | — | 480 macro cells |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tPD) | — | 15 ns |
| User I/O Pins | — | 153 |
| Programmability | — | In-System (ISP) via JTAG IEEE 1149.1 |
| Aras MSL | — | [DATA_NEEDED: MSL rating] |