EPM9560RI240-20C vs EPM9560RI240-20N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560RI240-20C disebabkan oleh Altera dan EPM9560RI240-20N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel
EPM9560RI240-20N ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EPM9560RI240-20C | EPM9560RI240-20N |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Masa Terakhir Dibeli |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EE PLD (CPLD) | — |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | 560 |
| User I/Os | 191 | 191 |
| Internal Operating Frequency | 100 MHz | — |
| Propagation Delay (tPD) | 20 ns (speed grade -20) | — |
| Supply Voltage (VCCINT) | 5 V | — |
| I/O Voltage | 3.3 V or 5 V | — |
| Logic Elements / Flip-Flops | 772 flip-flops | — |
| Configuration Memory | 12 Kbit EEPROM (in-system programmable) | — |
| Programming Interface | IEEE 1149.1 JTAG BST | — |
| Suhu Operasi | 0°C to +70°C (commercial grade) | 0C to +70C (commercial) |
| Kemasan | 240-pin RQFP (Power Quad Flat Pack) | 240-pin Power-enhanced BGA (RI240) |
| Process Technology | CMOS, EEPROM-based | CMOS EEPROM |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Logic Array Blocks (LABs) | — | 12 |
| Maximum Internal Frequency | — | 145 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 11.4 ns |
| Logic Family | — | CMOS |
| Programmability | — | In-system programmable (ISP) via JTAG (IEEE 1149.1) |
| Core Supply Voltage | — | 5.0 V |
| MultiVolt I/O | — | 5.0 V / 3.3 V compatible |
| Programming Language Support | — | AHDL, VHDL, Verilog HDL |
| Development Tools | — | MAX+PLUS II, Quartus II |
| Status RoHS | — | [DATA_NEEDED: RoHS compliance] |