M1AFS600-FG256 vs AFS600-2FG256 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci M1AFS600-FG256 disebabkan oleh Microchip Technology dan AFS600-2FG256 disebabkan oleh Microchip Technology. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Microchip Technology
M1AFS600-FG256 M1AFS600-FG256 - Fusion Mixed-Signal FPGA | Microchip

M1AFS600-FG256 - Fusion Mixed-Signal FPGA | Microchip

M1AFS600-FG256 ✓ Aktif
Microchip Technology
AFS600-2FG256 AFS600-2FG256 600K-Gate Mixed-Signal FPGA | Microchip

AFS600-2FG256 600K-Gate Mixed-Signal FPGA | Microchip

AFS600-2FG256 ✓ Aktif

Pengandingan Spesifikasi

Parametr M1AFS600-FG256 AFS600-2FG256
Merek Microchip Technology Microchip Technology
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Family Fusion —
Embedded Processor ARM Cortex-M1 —
System Gates 600K 600000 gates
Number of I/O 119 —
Total RAM Bits 110592 bits —
Core Supply Voltage 1.5V —
Process Technology 130nm 130 nm flash-based CMOS
Maximum Internal Frequency 1098.9 MHz —
Kemasan 256-LBGA —
Jenis Pemasangan Surface Mount Surface Mount
Gambaran Suhu Operasi [DATA_NEEDED: operating temperature range] —
Analog Blocks [DATA_NEEDED: ADC resolution and analog features] —
Flash Memory Size [DATA_NEEDED: flash memory size] —
I/O Standard Support [DATA_NEEDED: I/O standard support] —
Speed Grade Standard —
Status RoHS [DATA_NEEDED: RoHS status] unknown
Programmable Logic Blocks — 13824 CLBs
Logic Family — CMOS
Metal Layers — 7 layers
Tegangan Pemberi Arus — 1.5 V
Bilangan Pin — 256 pins
I/O Count — 119 I/O
Package Type — FBGA-256, 1.0 mm pitch
Suhu Operasi — 0°C to 85°C (32°F to 185°F)
Junction Temperature Test — 100°C
Configuration Memory — Flash-based, nonvolatile
Power-Up Behavior — Live at Power-Up (LAPU)
Analog Resources — Configurable analog blocks
Embedded Memory — Large flash memory blocks
Clock Management — Comprehensive clock generation and management circuitry
Product Family — Fusion mixed-signal FPGA

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