RTAX2000S-CG624PROTO vs RTAX2000S-1CGS624V Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci RTAX2000S-CG624PROTO disebabkan oleh Microchip Technology dan RTAX2000S-1CGS624V disebabkan oleh Microchip Technology. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Microchip Technology
RTAX2000S-CG624PROTO RTAX2000S-CG624PROTO - 2M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip

RTAX2000S-CG624PROTO - 2M-Gate Rad-Tolerant FPGA CCGA-624 | Microchip

RTAX2000S-CG624PROTO ✓ Aktif
Microchip Technology
RTAX2000S-1CGS624V RTAX2000S-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000S-1CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000S-1CGS624V ✓ Aktif

Pengandingan Spesifikasi

Parametr RTAX2000S-CG624PROTO RTAX2000S-1CGS624V
Merek Microchip Technology Microchip Technology
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Family RTAX-S Radiation-Tolerant FPGA RTAX-S Radiation-Tolerant FPGA
System Gates 2,000,000 —
Logic Cells (R-cells) 21,504 —
D-Flip-Flops (Registers) 32,256 —
Logic Architecture CMOS antifuse (OTP), SEU-hardened —
Kemasan CCGA-624 (ceramic column grid array, 624 balls) CG624 Ceramic Column Grid Array (CCGA), 624 balls
Jenis Pemasangan Surface Mount Surface Mount
Suhu Operasi -55C to +125C -55C to +125C
Logic Family CMOS CMOS
Configuration Live at power-up (non-volatile antifuse) Live at power-up, single-chip (no external config device)
SEU Immunity SEU rate < 10^-10 errors/bit-day (per family datasheet) —
Prototyping Variant Yes (PROTO suffix) —
Embedded Memory Embedded SRAM blocks (FIFO / dual-port capable) Embedded SRAM with built-in FIFO control logic
I/O Standards Single-ended and differential (P/N pin pairs) —
Design Software Microsemi/Microchip Libero SoC —
Tegangan Pemberi Arus [DATA_NEEDED: core and I/O supply voltage] —
Total Ionizing Dose (TID) [DATA_NEEDED: TID rating in krad(Si)] —
Status RoHS [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS status]
Maximum I/O Count (624-ball pkg) [DATA_NEEDED: user I/O count] —
Moisture Sensitivity Level [DATA_NEEDED: MSL level] —
Equivalent System Gates — 2,000,000
Configurable Logic Blocks (CLBs) — 21,504
Total Logic Cells — 32,256
ASIC Gate Capacity (companion) — 250,000 gates
Core Supply Voltage (nominal) — 1.5 V
Core Supply Voltage Range — 1.425 V to 1.575 V
Speed Grade — -1
Programming Technology — Antifuse (one-time programmable)
SEU Hardening — SEU-hardened registers, immune to single-event upsets
Weight — [DATA_NEEDED: package weight]

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