AI chip bottlenecks shift downstream: what 800V, CoWoS-L and HBM sellouts mean for design-in
AI demand is no longer gated by GPU supply. Power, HBM, CoWoS-L, GaN and CPO are the new constraints designers and buyers must plan around.
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Eight new power, GaN, SiC and solid-state-battery parts to weigh on October 2026 BOMs
Renesas TP65H020G4PLSGBD 650 V GaN FET, Vishay 650 V Superjunction modules, Diodes SBRFP rectifiers, Infineon-Eaton SiC SST work, a Navitas 10 kV SiC IGBT program slot and an ITEN 1,500 µAh SMD cell all landed in one week.
·5 min bacaan
Renesas H8 EOL and SiC 1200V Stretch Reshape Q4 2026 Sourcing Priorities
Renesas EOLs H8 microcontrollers embedded in 200M devices; 1200V SiC lead times push to Q3 2027; HBM3E locked up while commodity DRAM and NAND stay flat.
·5 min bacaan
Microchip and Navitas 800V-to-6V reference design: what it changes for AI server power BOMs
Microchip and Navitas combine GaN power stages and a dsPIC33AK DSC into a single 800V-to-6V reference design for AI racks, targeting Nvidia's Kyber ecosystem.
Intel 14A stays central to Musk Terafab as TSMC sublease talk narrows
Musk confirmed Intel's 14A process remains the manufacturing plan for Terafab, while TSMC would only potentially sublease part of the site.
·5 min bacaan
Aehr Lands $6M Sonoma Follow-On for Hyperscaler's Next-Gen AI Burn-In — What It Means for Test Capacity
A lead hyperscaler has placed about $6M in follow-on orders for Aehr's Sonoma package-level burn-in systems, targeting a second next-gen AI processor ramping in calendar 2027.
Skyworks Si829x Gate Driver Qualifies AEC-Q100: What It Means for SiC and IGBT Inverter Designs
Skyworks has AEC-Q100 qualified its Si829x isolated gate driver and released samples. The device targets ASIL D traction inverters with up to 15 A variable-current drive for SiC FETs and IGBTs.
·4 min bacaan
Hybrid bonding process control: why complementary inspection tools matter for advanced packaging yields
KLA-via-Semiconductor-Engineering explains how 2D, IR, and 3D metrology combine to catch surface, sidewall, and sub-surface defects in hybrid-bonded packages.
Astera Labs broadens Aries 7 PCIe 7 connectivity line for multi-rack AI clusters
Astera Labs adds retimers, redrivers, cable modules, optical drivers and TAs to its Aries 7 portfolio, with sampling due in Q4 2026 ahead of OCP Global Summit demos.
Semiconductor sales cross $1 trillion early as AI demand stretches HBM and 2nm supply
SIA and SEMI August 2026 data show global chip sales up 144% year-on-year; Omdia lifts 2026 growth to 94.1% while HBM, advanced packaging and 2nm remain bottlenacked into 2027.
·4 min bacaan
Frore Systems LiquidJet Diamond coldplate: 35% tokens/Watt gain reshapes AI factory cooling BOM
Frore Systems adds an integrated diamond spreader to its LiquidJet coldplate, claiming 35% tokens/Watt efficiency versus skived coldplates for hyperscaler AI factories.
HPE ProLiant Gen13: Four AMD EPYC Venice Servers and What They Mean for AI BOMs
HPE launches its first four Gen13 servers on 6th Gen AMD EPYC, targeting agentic AI and inference. XAIPART maps the parts and sourcing impact.
·4 min bacaan
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