DDC232CGXGR-2 - 32-Ch 20-Bit Current-Input ADC | Texas Instruments
MPN: DDC232CGXGR-2 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $84.5 | $84.50 |
| 10 | $77.12 | $771.20 |
| 100 | $68.9 | $6,890.00 |
| 500 | $61.45 | $30,725.00 |
| 1,000 | $54.8 | $54,800.00 |
DDC232CGXGR-2 Overview
What is a current-input analog-to-digital converter? A current-input ADC (sometimes called a current-to-digital converter or IDC) is a category of data converter that directly digitizes small input currents rather than voltage, replacing the traditional transimpedance amplifier (TIA) plus voltage ADC chain. Current-input ADCs belong to the broader hierarchy of analog-to-digital converters -> data converters -> mixed-signal ICs -> signal chain. By integrating charge directly on its input, a current-input ADC removes the TIA's noise, drift, and bandwidth trade-offs and is widely used in photodiode, ionization, and picoammeter front-ends where femtoampere-to-microampere signals must be digitized with high precision.
Key features include 32 independent current-input channels, full-scale range from approximately 12.5 pC to 350 pC set by external capacitor and clock, serial digital interface for cascading, on-chip integration capacitors to reduce BOM, and very low power dissipation of approximately 7 mW per channel. The wide dynamic range and integrating architecture make the part well-suited for low-frequency, high-precision measurements where 50/60 Hz line rejection is required.
The DDC232CGXGR-2 uses a charge-balancing, continuous-integration sigma-delta architecture per channel pair, with digital filtering that yields 20-bit noise-free codes when conversion time is sufficiently long. The -2 suffix indicates the 0 to +70 °C commercial operating temperature range, distinguishing it from the DDC232CKZXGR industrial-grade version. Two on-chip integration capacitors (CF1, CF2) can be combined or switched, allowing four full-scale ranges to be programmed without external capacitors in most applications.
Typical applications include X-ray and CT detector arrays, photodiode array readout, gas chromatography detectors, multi-channel ionization chambers, scintillation detector front-ends, and analytical instrumentation such as mass spectrometers. The integrating topology intrinsically rejects 50/60 Hz line frequency interference, which is essential for sensitive laboratory and medical measurements.
When designing with this device, ensure the input bias currents do not exceed the integrator's specified range and provide adequate input protection if the source can overdrive. Decouple analog and digital supplies with 0.1 µF and 10 µF capacitors placed as close to the supply balls as possible, and keep analog and digital grounds separated until tied at a single point.
This page synthesizes distributor pricing, drop-in same-package alternatives, parametric comparisons against competing TI SKUs, and practical design notes not found in the manufacturer datasheet alone, giving the engineer a single, citable decision-making reference for the DDC232CGXGR-2.
Drop-in alternatives for DDC232CGXGR-2 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DDC232CGXGR-2 (same form factor and footprint) — differing in Analog Supply Voltage, Digital Supply Voltage, Package, Resolution.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DDC232CKZXGR
✅ Drop-In📋 Reference alternative (not in catalog)
DDC232CGXGR
✅ Drop-In📋 Reference alternative (not in catalog)
DDC232CZXGR
✅ Drop-In📋 Reference alternative (not in catalog)
DDC316
✅ Drop-In📋 Reference alternative (not in catalog)
ADS131A04IPW
✅ Drop-In📋 Reference alternative (not in catalog)
DDC232CGXGR-2 Maximum Ratings & Electrical Characteristics
| Resolution | 20 bit |
| Number of Input Channels | 32 |
| Number of ADCs | 16 (dual-channel current-input integrating modulators) |
| Converter Architecture | Sigma-Delta, current-input integrating |
| Sampling Rate (Per Channel) | 3.1 kS/s max |
| Data Interface | Serial |
| Input Current Range | Approximately 12.5 pC to 350 pC full-scale (set by external capacitor and clock) |
| Integral Linearity | ±0.025% of Reading ±1.0 ppm of FSR |
| Input-Referred Noise | 5.3 ppm of FSR |
| Analog Supply Voltage | +5 V |
| Digital Supply Voltage | +2.7 V to +3.6 V |
| Power Dissipation | 7 mW per channel (typical) |
| Operating Temperature Range | 0 °C to +70 °C |
| Package | 64-ball NFBGA (8 mm x 8 mm) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| AEC-Q100 Automotive Grade | Not applicable (commercial grade) |
DDC232CGXGR-2 Pin Configuration
| Pin A1 | AVDD — +5 V analog supply |
| Pin A2 | AGND — Analog ground |
| Pin A4 | IN0A — Current input channel 0A |
| Pin A5 | IN1A — Current input channel 1A |
| Pin B1 | AVDD — +5 V analog supply |
| Pin B2 | AGND — Analog ground |
| Pin B3 | REFIN — External reference input |
| Pin B4 | IN2A — Current input channel 2A |
| Pin B5 | IN3A — Current input channel 3A |
| Pin B6 | IN4A — Current input channel 4A |
| Pin B7 | IN5A — Current input channel 5A |
| Pin C1 | AVDD — +5 V analog supply |
| Pin C2 | AGND — Analog ground |
| Pin C3 | CF1 — Integration capacitor node 1 |
| Pin C4 | CF2 — Integration capacitor node 2 |
| Pin C5 | IN6A — Current input channel 6A |
| Pin C6 | IN7A — Current input channel 7A |
| Pin C7 | IN0B — Current input channel 0B |
| Pin C8 | IN1B — Current input channel 1B |
| Pin D1 | DVDD — +2.7 V to +3.6 V digital supply |
| Pin D2 | DGND — Digital ground |
| Pin D3 | SCLK — Serial interface clock |
| Pin D4 | DOUT — Serial data output |
| Pin D5 | DIN — Serial data input |
| Pin D6 | SYNC — Conversion synchronization input |
| Pin D7 | IN2B — Current input channel 2B |
| Pin D8 | IN3B — Current input channel 3B |
| Pin E1 | DVDD — +2.7 V to +3.6 V digital supply |
| Pin E2 | DGND — Digital ground |
| Pin E3 | CONV — Conversion start input |
| Pin E4 | RESET — Device reset input |
| Pin E5 | TEST — Test mode enable |
| Pin E6 | IN4B — Current input channel 4B |
| Pin E7 | IN5B — Current input channel 5B |
| Pin E8 | IN6B — Current input channel 6B |
| Pin F1 | AVDD — +5 V analog supply |
| Pin F2 | AGND — Analog ground |
| Pin F3 | IN7B — Current input channel 7B |
| Pin F4 | IN8A — Current input channel 8A |
| Pin F5 | IN9A — Current input channel 9A |
| Pin F6 | IN10A — Current input channel 10A |
| Pin F7 | IN11A — Current input channel 11A |
| Pin F8 | IN12A — Current input channel 12A |
| Pin G1 | AVDD — +5 V analog supply |
| Pin G2 | AGND — Analog ground |
| Pin G3 | IN13A — Current input channel 13A |
| Pin G4 | IN14A — Current input channel 14A |
| Pin G5 | IN15A — Current input channel 15A |
| Pin G6 | IN8B — Current input channel 8B |
| Pin G7 | IN9B — Current input channel 9B |
| Pin G8 | IN10B — Current input channel 10B |
| Pin H1 | NC — Not connected (per datasheet) |
| Pin H2 | NC — Not connected (per datasheet) |
| Pin H3 | IN11B — Current input channel 11B |
| Pin H4 | IN12B — Current input channel 12B |
| Pin H5 | IN13B — Current input channel 13B |
| Pin H6 | IN14B — Current input channel 14B |
| Pin H7 | IN15B — Current input channel 15B |
| Pin H8 | NC — Not connected (per datasheet) |
Typical Applications
DDC232CGXGR-2 is suitable for 7 applications: X-Ray and CT Detector Array Readout, Multi-Channel Photodiode Array Front-End, Ionization Chamber and Dosimeter Readout, Gas Chromatography Detector Electronics, Scintillation Detector Readout for PET and Gamma Cameras, Analytical Instrumentation - Mass Spectrometer Detector, Process Control Multi-Channel pH/Ion Probe Monitoring.
X-Ray and CT Detector Array Readout
The DDC232CGXGR-2 fits multi-channel X-ray and CT detector readout because its 32 independent current-input channels each integrate photodiode or scintillator-plus-photodiode currents directly, eliminating the need for per-channel transimpedance amplifiers. The integrating sigma-delta topology gives 20-bit noise-free resolution at low per-channel throughputs typical of CT slice rates, while intrinsic 50/60 Hz line rejection removes mains-induced pickup that would otherwise corrupt the reconstructed image. Power per channel is only about 7 mW, allowing dense detector boards with minimal thermal load near the sensor array.
Recommended
Multi-Channel Photodiode Array Front-End
The DDC232CGXGR-2 is well matched to multi-channel photodiode arrays in spectrophotometers, optical scanners, and large-format image sensors where each pixel or pixel-group output current must be digitized with high precision. Its on-chip integration capacitors (CF1/CF2) and programmable full-scale range from approximately 12.5 pC to 350 pC per cycle allow direct integration of low-level photodiode currents without external TIA stages. The 64-ball NFBGA package is footprint-compatible with the higher-speed DDC232CK, enabling PCB reuse across product variants that share the same photodiode interface.
Recommended
Ionization Chamber and Dosimeter Readout
The DDC232CGXGR-2 integrates the very small DC currents from ionization chambers, survey meters, and radiation dosimeters directly with high precision, replacing discrete electrometer front-ends. Its 20-bit resolution and 5.3 ppm-of-FSR noise allow detection of femtoampere-level currents typical of ion-chamber leakage, and its integrating topology rejects 50/60 Hz line interference that would otherwise mask the small signal. The 32-channel capacity lets one IC digitize a multi-probe survey instrument or a multi-element dosimeter array.
Recommended
Gas Chromatography Detector Electronics
The DDC232CGXGR-2 digitizes the low-frequency analog output of gas chromatography detectors such as flame ionization detectors (FID) and thermal conductivity detectors (TCD). Its 32-channel integrating topology simultaneously captures the analog outputs of multi-detector GC systems, with 20-bit precision adequate for trace-level ppm/ppb concentration measurements. Intrinsic 50/60 Hz rejection and the 0 °C to +70 °C commercial range match laboratory GC instrument operating conditions.
Recommended
Scintillation Detector Readout for PET and Gamma Cameras
The DDC232CGXGR-2 is suitable for PET and gamma-camera scintillation detector front-ends, where photomultiplier tube (PMT) or silicon photomultiplier (SiPM) outputs are integrated as charge pulses and digitized with high precision. The 32-channel current input capacity allows one chip to handle many SiPM channels, and the integrating topology inherently captures the full scintillation pulse energy, supporting energy-window discrimination. Low 7 mW-per-channel power dissipation keeps heat away from the cooled detector assembly.
Recommended
Analytical Instrumentation - Mass Spectrometer Detector
The DDC232CGXGR-2 fits mass spectrometer detector electronics that require digitizing multiple low-current Faraday-cup or electron-multiplier channels simultaneously. Its 20-bit integrating precision captures both the large Faraday signals and the small electron-multiplier pulses with the same dynamic range, while the integrating topology rejects 50/60 Hz line interference that would otherwise raise the noise floor of ppm-level concentration traces. The 64-ball NFBGA package's compact 8x8 mm footprint fits inside dense MS detector modules.
Recommended
Process Control Multi-Channel pH/Ion Probe Monitoring
The DDC232CGXGR-2 fits industrial process control racks that monitor many pH, ion-selective, or conductivity probes, providing 32 channels of high-impedance current-input digitization in a single chip. Its integrating topology rejects mains-frequency pickup common in factory environments, and the on-chip integration capacitors reduce BOM compared to discrete electrometer designs. The 0 °C to +70 °C commercial range suits cabinet-mounted process analyzers in temperature-controlled control rooms.
Recommended
Recommended Products Summary
Engineering reference data for DDC232CGXGR-2 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DDC232CKZXGR | DDC232CGXGR | DDC232CZXGR | DDC316 | ADS131A04IPW |
|---|---|---|---|---|---|---|
| Package | 64-ball NFBGA (8x8 mm) | 64-ball NFBGA (8x8 mm) - same | 64-ball NFBGA (8x8 mm) - same | 64-ball NFBGA (8x8 mm) - same | BGA-64 - same family | TSSOP-32 - different |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Number of Input Channels | 32 | 32 | 32 | 32 | 16 (-50%) | 4 (-87%) |
| Resolution | 20 bit | 20 bit | 20 bit | 20 bit | 16 bit (-4 bits) | 24 bit (+4 bits) |
| Sampling Rate (Per Channel) | 3.1 kS/s | Higher (K-speed variant) | 3.1 kS/s | 3.1 kS/s | 50 MSPS (much higher) | 32 kS/s |
| Converter Architecture | Current-input integrating sigma-delta | Current-input integrating sigma-delta | Current-input integrating sigma-delta | Current-input integrating sigma-delta | Charge-domain high-speed | Voltage-input delta-sigma |
| Operating Temperature Range | 0 °C to +70 °C | -40 °C to +85 °C | 0 °C to +70 °C | 0 °C to +70 °C | -40 °C to +85 °C | -40 °C to +125 °C |
| Power Dissipation (Per Channel) | 7 mW | Similar (K-speed higher) | 7 mW | 7 mW | Higher (high-speed) | Approx 3 mW per channel |
| RoHS Status | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Key Differentiators
- 32-channel density with on-chip integration capacitors (vs DDC316 (16-channel, no on-chip CF))
- Higher resolution at low throughput (vs DDC316 (16-bit at high speed))
- Lower per-channel power at high precision (vs DDC232CKZXGR (K-speed variant))
Design Notes
The DDC232CGXGR-2 requires separate analog (+5 V) and digital (+2.7 V to +3.6 V) supplies. Place a 0.1 µF ceramic bypass capacitor as close as possible to each AVDD and DVDD ball, with a 10 µF tantalum or ceramic bulk capacitor at the supply pins. Star-route analog and digital grounds back to a single tie-point under the IC to avoid digital switching noise coupling into the sensitive integrator capacitors. The analog supply should be low-noise - a ferrite bead in series plus an LDO post-regulator from the system 5 V rail is recommended for precision applications.
Do not apply voltage directly to the current input balls - exceeding the input compliance range of the on-chip integrator will saturate the integrator and cause non-linear conversion. Always ensure the upstream photodiode or ionization source is current-limited. Also, the two integration capacitors CF1 and CF2 must be selected to keep the integrated charge within the 12.5 pC to 350 pC full-scale window for the chosen conversion clock; selecting CF outside this range causes either integrator saturation (too large a charge) or excessive quantisation noise (too small a charge).
Use a solid uninterrupted ground plane under the NFBGA-64 package. Route the 32 analog input traces as guarded differential pairs to suppress leakage and crosstalk, with each input's guard trace biased to the same potential as the input. Keep the serial digital interface traces (SCLK, DOUT, DIN, SYNC) on the opposite side of the ground plane and far from the analog inputs to avoid digital-noise coupling. The exposed pad of the BGA, if present, should be soldered to the ground plane for thermal dissipation.
Estimated: at +5 V analog supply and 7 mW per channel x 32 channels = 224 mW total device dissipation. With the 64-ball NFBGA package's typical theta_JA of approximately 60 C/W on a JEDEC test board, the junction temperature rise above ambient is approximately 13 C, well within the 0 to +70 °C commercial range. For dense detector boards with limited airflow, provide copper pours under and around the BGA to keep junction temperature below 90 C and ensure the 20-bit linearity is preserved.
The integrating topology intrinsically filters high-frequency noise, but 50/60 Hz line-frequency pickup must be rejected by choosing the conversion cycle time as an integer multiple of the line period (e.g. 16.67 ms for 60 Hz regions). Set the conversion clock and CF value such that total integration time equals N*(1/f_line). For best 20-bit noise performance, choose longer integration times and accept lower per-channel sampling rate. The serial digital interface should be clocked at or below 20 MHz to avoid digital noise coupling into the analog integrator.
Compliance Information
RoHS compliant per Texas Instruments product page and DigiKey listing 12352219. Not AEC-Q100 qualified - this is a commercial-grade 0 to +70 °C part. For automotive applications, no AEC-Q100 variant is offered in the DDC232 family.
