DSPIC33FJ128GP706AT-I/PT - 16-bit 40MIPS DSC | Microchip Technology
MPN: DSPIC33FJ128GP706AT-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $8.2 | $8.20 |
| 10 | $7.45 | $74.50 |
| 100 | $6.6 | $660.00 |
| 500 | $5.9 | $2,950.00 |
| 1,000 | $5.25 | $5,250.00 |
DSPIC33FJ128GP706AT-I/PT Overview
A digital signal controller combines the computational throughput of a digital signal processor (DSP) with the ease of use and peripheral integration of a microcontroller (MCU). Within the embedded systems hierarchy, the dsPIC33F family sits above general-purpose 8-bit MCUs and alongside 16-bit MCU platforms such as PIC24, sharing its core architecture while adding DSP engine instructions. This makes DSCs the natural choice for control loops that must also execute signal-processing algorithms such as filtering, transforms, or estimation.
Key features include the 16-bit modified Harvard architecture running at 40 MIPS, a hardware DSP engine with barrel shifter and multiply-accumulate support, multiple internal buses for simultaneous instruction and data fetch, and In-Circuit Serial Programming (ICSP) plus in-circuit debugging via two I/O pins and the reset line. The 'A' revision silicon and the 'T' (tape-and-reel qualified) suffix denote the updated die revision suitable for volume production programs.
Architecturally, the CMOS device implements a fixed-point pipeline with dedicated DSP multiply hardware, boundary scan capability, and low-power management modes that allow sleep and idle states for battery-conscious designs. Program memory is self-programmable Flash, supporting field firmware updates.
Typical applications span industrial automation, digital power conversion, motor control, sensor signal conditioning, and audio processing, where deterministic 16-bit control plus MAC-heavy math are required in a single chip.
Design consideration: at 40 MIPS the device is clock-sensitive; follow Microchip's oscillator layout and decoupling guidance, and verify Flash wait-state settings at the selected operating frequency and voltage.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33FJ128GP706AT-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128GP706AT-I/PT (same form factor and footprint) — differing in Operating Temperature, Core Architecture, Package, RoHS Status, Packaging.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128GP706A-I/PT
✅ Drop-In✓ In Stock
$7.86 / Unit
View Datasheet →DSPIC33FJ128GP706A-E/PT
✅ Drop-In✓ In Stock
$5.9 / Unit
View Datasheet →DSPIC33FJ128GP706AT-E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128GP206AT-I/PT
✅ Drop-In✓ In Stock
$4.6 / Unit
View Datasheet →DSPIC33FJ128GP310T-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$5.46 / Unit
View Datasheet →DSPIC33FJ128GP706AT-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F RISC (modified Harvard) |
| Max Clock Frequency | 40 MHz |
| Performance | 40 MIPS |
| Program Memory | 128KB (128K x 8) Flash |
| RAM | 8KB |
| Supply Voltage | 3.3 V |
| Package | 64-TQFP (10x10 mm) |
| Operating Temperature | -40C to +85C (I grade) |
| Process Technology | CMOS |
| DSP Features | Barrel shifter, hardware multiply-accumulate, boundary scan |
| Programming Interface | ICSP (In-Circuit Serial Programming), 2-wire + reset |
| Mounting Type | Surface Mount |
| Device Revision | A revision silicon, T (tape/reel flow) suffix |
| RoHS Status | Lead free / RoHS compliant |
| Product Family | dsPIC33FJ128GP706A |
| Packaging | Tape and Reel (T/R) |
DSPIC33FJ128GP706AT-I/PT 64-tqfp (10x10 mm) Pin Configuration Guide
Pin configuration for DSPIC33FJ128GP706AT-I/PT (64-tqfp (10x10 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33FJ128GP706AT-I/PT.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33FJ128GP706AT-I/PT is suitable for 6 applications: Industrial Automation and Control, Digital Power Conversion, Sensor Signal Conditioning, Motor Control Drives, Audio Signal Processing, Portable and Battery-Powered Instruments.
Industrial Automation and Control
Factory automation nodes need deterministic control plus math headroom for filtering and protocol handling. The DSPIC33FJ128GP706AT-I/PT delivers 40 MIPS of 16-bit throughput with a hardware barrel shifter, allowing a single chip to close control loops at multi-kHz rates while servicing fieldbus communication. Its 128KB self-programmable Flash stores protocol stacks, calibration tables, and field-updatable firmware, and ICSP programming via two I/O pins simplifies in-system updates on installed equipment. With a -40C to +85C industrial rating and 3.3V CMOS operation, it fits directly into standard industrial I/O designs.
Recommended
Digital Power Conversion
Switching power supplies and PFC stages benefit from the dsPIC33F combination of fast multiply-accumulate and deterministic execution. Running at 40 MIPS, the DSPIC33FJ128GP706AT-I/PT can execute compensator calculations and duty-cycle updates for digital power loops with predictable latency. The GP-series ADC inputs sample voltage and current feedback, while the 128KB Flash supports complex startup sequences, soft-start state machines, and fault logging. Designers migrating from analog control use this controller to add adaptive algorithms, and Microchip's digital power reference designs document the surrounding gate-drive and feedback circuitry.
Recommended
Sensor Signal Conditioning
Precision sensor front ends require both analog acquisition and DSP filtering. The DSPIC33FJ128GP706AT-I/PT samples analog channels through its integrated ADC and applies FIR/IIR filters using the hardware DSP engine at 40 MIPS, suppressing noise before results reach the host. The 8KB RAM buffers sample windows, and the 128KB Flash holds multi-point calibration curves. Its -40C to +85C rating suits outdoor and industrial sensing, while low-power idle and sleep modes reduce average draw in battery-backed nodes. Two-wire ICSP debugging lets engineers tune filter coefficients in-system during commissioning.
Recommended
Motor Control Drives
Brushless DC and induction drives need fast current loops plus position estimation. According to Microchip, the dsPIC33F DSC family pairs DSP-class multiply-accumulate with MCU simplicity, enabling field-oriented control implementations on a 16-bit fixed-point core. The DSPIC33FJ128GP706AT-I/PT runs FOC at 40 MIPS while its Flash holds commutation tables and protection logic; for designs needing dedicated motor-control PWM peripherals, the pin-compatible dsPIC33FJ128MC706A variant is the purpose-built choice. Encoders or resolver feedback interface through the GP-series capture and quadrature resources, and the industrial temperature range suits drive electronics.
Recommended
Audio Signal Processing
Embedded audio products use the dsPIC33F DSP engine for equalization, dynamic range control, and effects. At 40 MIPS with single-cycle MAC operations, the DSPIC33FJ128GP706AT-I/PT processes multiple audio filter bands in real time, while the 128KB Flash stores coefficient sets for different product variants. The GP-series peripherals handle I2S-style data routing through SPI/UART-class resources, and the 3.3V supply simplifies integration with codec chips. The 'A'-revision silicon and tape-and-reel T-flow packaging make the AT-I/PT suffix the production-appropriate choice for consumer and professional audio hardware builds.
Recommended
Portable and Battery-Powered Instruments
Handheld instruments require compute throughput with disciplined power consumption. The DSPIC33FJ128GP706AT-I/PT offers idle and sleep low-power modes that cut current dramatically between measurements, while 40 MIPS wake-up performance executes FFT-based analysis or averaging routines quickly, shortening active duty cycles and extending battery life. The 64-TQFP 10x10 mm footprint fits compact instrument PCBs, and the integrated ADC, timers, and communication peripherals reduce external component count. Boundary scan support aids production test of densely packed boards, and ICSP enables firmware updates in the field without desoldering the controller.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128GP706AT-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128GP706A-I/PT | DSPIC33FJ128GP706A-E/PT | DSPIC33FJ128GP706AT-E/PT | DSPIC33FJ128GP206AT-I/PT |
|---|---|---|---|---|---|
| Package | 64-TQFP (10x10 mm) | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Performance | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS |
| Program Memory | 128KB Flash | 128KB Flash | 128KB Flash | 128KB Flash | 128KB Flash class (verify per datasheet) |
| Operating Temperature | -40C to +85C (I) | -40C to +85C (I) | -40C to +125C (E) | -40C to +125C (E) | -40C to +85C (I) |
| Packaging Flow | T-flow tape-and-reel | Tray/tube | Tray/tube | T-flow tape-and-reel | T-flow tape-and-reel |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
Key Differentiators
- Maximum program memory in the same 64-TQFP footprint (vs DSPIC33FJ128GP206AT-I/PT)
- Extended-temperature drop-in margin available (vs DSPIC33FJ128GP706AT-E/PT)
- Tape-and-reel production flow (vs DSPIC33FJ128GP706A-I/PT)
Design Notes
Supply the dsPIC33F core and I/O from a clean 3.3V rail following the regulator configuration specified for 'A'-revision silicon in the family datasheet (external regulator or internal regulator per device option - confirm the exact requirement for GP706A before layout). Place 0.1uF ceramic decoupling at each VDD pin pair plus one bulk capacitor (estimated: 10uF is a common bulk choice) near the device. Supply ripple at 40 MIPS operation reduces oscillator and Flash timing margin, so keep the power plane low impedance and avoid routing fast digital returns under the oscillator.
Use the 64-TQFP 10x10 mm footprint with standard 0.5 mm pitch land pattern per the manufacturer package drawing. Route the ICSP programming pins (two I/O pins plus MCLR) to a header so MPLAB Snap or ICD tools can perform in-circuit debugging and programming without board rework. Keep analog ADC input traces short and away from PWM or clock lines; use a solid ground plane beneath the device. If peripheral pin multiplexing is used, verify the schematic against the datasheet pin tables, not against the GP706 (non-A) drawing.
Do not substitute the -I (85C) part into designs exposed to +125C ambient near power stages - use DSPIC33FJ128GP706AT-E/PT instead. Distinguish the 'A'-revision die from the original GP706 in firmware and errata checks: register behavior and documented errata differ between revisions, so always develop against the GP706A datasheet. Confirm Flash density assumptions before migrating code between GP706A and GP206 variants of the same footprint, since memory maps and peripheral sets differ even when the pinout is shared.
Compliance Information
Lead free / RoHS compliant per distributor listings (Components-Store, DigiKey). REACH, halogen-free, conflict minerals, and AEC-Q100 status not stated in provided data - confirm via Microchip product compliance documentation.
