DSPIC33EP128GM306-I/PT - 70 MIPS DSC 128KB TQFP-64 | Microchip
MPN: DSPIC33EP128GM306-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $9.23 | $9.23 |
| 10 | $8.8 | $88.00 |
| 100 | $8.1 | $810.00 |
| 500 | $7.45 | $3,725.00 |
| 1,000 | $6.9 | $6,900.00 |
DSPIC33EP128GM306-I/PT Overview
A digital signal controller combines the compute architecture of a microcontroller with DSP-engine features such as single-cycle MAC, modulo and bit-reversed addressing, and hardware divide support. Within the power-management hierarchy, the DSC sits between general-purpose MCUs and dedicated DSPs, making the dsPIC33E family a common choice for real-time control loops that also need general-purpose I/O and communication peripherals.
Key features include the 70 MIPS dsPIC33E core with DSP instruction extensions, integrated operational amplifiers, multiple PWM channels with complementary outputs and dead-time control, four input capture / output compare units, and quadrature encoder interface (QEI) support. Communication interfaces cover UART, SPI, and I2C, with support for IrDA modes. The Mouser listing confirms 128KB Flash, 16KB RAM, 12 motor-control-oriented channels, and 8/8 IC/OC with QEI and op-amps.
Architecturally, the dsPIC33E core uses a 16-bit modified Harvard pipeline with dedicated DSP addressing modes, enabling deterministic execution for current-loop control at high PWM frequencies. On-chip op-amps can be internally routed to ADC inputs, reducing external component count in current-sense paths.
Typical applications include precision motor control (BLDC, PMSM, stepper), digital power conversion, sensor signal conditioning, and industrial automation nodes where deterministic DSP processing and rich peripherals are required.
Design consideration: all VDD/VSS pins must be connected and PGECx/PGEDx pairs must be used as matched pairs for ICSP programming and debugging.
This page synthesizes distributor pricing, drop-in same-family alternatives, and practical design notes not found in the manufacturer datasheet, with pricing verified as of 2026-09-23.
Drop-in alternatives for DSPIC33EP128GM306-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GM306-I/PT (same form factor and footprint) — differing in Operating Temperature, Package, Packaging, RAM, RoHS Status.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP128GM306-E/PT
✅ Drop-In✓ In Stock
$6.15 / Unit
View Datasheet →DSPIC33EP128GM304T-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$3.95 / Unit
View Datasheet →DSPIC33EP128GM302-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP256GM306-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GP306-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM306-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33E DSC core |
| Maximum CPU Speed | 70 MIPS |
| Program Memory (Flash) | 128 KB |
| RAM | 16 KB |
| Supply Voltage | 3.3 V |
| Package | 64-TQFP (10x10 mm) |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +85C (I grade) |
| Interfaces | I2C, SPI, UART/USART, IrDA |
| Motor Control PWM | 12 channels (complementary, dead-time) |
| Input Capture / Output Compare | 8 IC / 8 OC |
| Quadrature Encoder Interface | QEI4 |
| Integrated Op-Amps | Yes (2 op-amps) |
| Programming Interface | ICSP via PGECx/PGEDx pairs |
| RoHS Status | Compliant |
| Product Family | dsPIC33EP128GM306 (dsPIC33E family) |
DSPIC33EP128GM306-I/PT 64-tqfp (10x10 mm) Pin Configuration Guide
Pin configuration for DSPIC33EP128GM306-I/PT (64-tqfp (10x10 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33EP128GM306-I/PT.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33EP128GM306-I/PT is suitable for 6 applications: Precision BLDC/PMSM Motor Control, Digital Power Conversion, Industrial Automation Nodes, Sensor Signal Conditioning and DSP Front Ends, Embedded Control with Connectivity (IoT Edge Nodes), Test and Measurement Instruments.
Precision BLDC/PMSM Motor Control
The DSPIC33EP128GM306-I/PT is purpose-built for precision motor control: its 70 MIPS DSP core executes field-oriented control (FOC) current loops deterministically, while 12 motor-control PWM channels provide complementary outputs with hardware dead-time insertion for three-phase inverters. The integrated op-amps condition shunt-resistor current signals and can be internally routed to the ADC, removing external amplifier stages and improving sense accuracy at high PWM frequencies. The quadrature encoder interface accepts position feedback directly without software overhead. According to Microchip, dsPIC33E DSCs enable more energy-efficient precision motor-control systems. A typical PMSM drive runs a 20 kHz PWM with a 20 kHz FOC current loop, well within the core budget, and the 128 KB Flash accommodates FOC, speed ramps, and a communication stack concurrently.
Recommended
Digital Power Conversion
In digitally controlled AC/DC and DC/DC converters, the DSPIC33EP128GM306-I/PT provides the fast control-loop execution and high-resolution PWM needed for peak-current-mode or average-current-mode regulation. The 70 MIPS core sustains voltage- and current-loop bandwidths of several kilohertz, while the motor-control PWM module's dead-time and fault inputs support half-bridge and full-bridge topologies with cycle-by-cycle current limiting. The 8 input-capture channels measure switching-node timing, and the 3.3V industrial-grade device interfaces cleanly with gate-driver logic. Placing the DSC in the feedback path with the integrated op-amps amplifying shunt signals lets one chip manage PFC plus downstream stage control. Firmware-based control also enables adaptive compensation, soft-start shaping, and telemetry reporting over UART or I2C without extra silicon.
Recommended
Industrial Automation Nodes
Factory-automation nodes benefit from the DSPIC33EP128GM306-I/PT's combination of DSP throughput and conventional MCU peripherals. UART, SPI, and I2C (with IrDA support) connect sensors, displays, and fieldbus bridges, while the 12 PWM channels drive actuators, valves, and small motors with hardware dead-time safety. The industrial -40C to +85C temperature rating suits cabinet-mounted electronics, and the 128 KB Flash / 16 KB RAM budget holds protocol stacks and diagnostic logging. The quadrature encoder interface reads shaft positions from rotary encoders directly, enabling closed-loop positioning in conveyors, gantries, and indexers. Deterministic interrupt latency supports time-critical I/O scanning, and in-circuit programming via any PGECx/PGEDx pair allows field firmware updates without removing the board from the machine.
Recommended
Sensor Signal Conditioning and DSP Front Ends
The on-chip op-amps and DSP instruction set (single-cycle MAC, dual operand fetch, bit-reversed addressing for FFTs) make the DSPIC33EP128GM306-I/PT effective for embedded signal-conditioning front ends. Sensor outputs from pressure, flow, or load-cell bridges can be amplified by the internal op-amps, digitized by the ADC, and processed with FIR/IIR filters or FFT-based analysis entirely on-chip, eliminating a separate analog conditioning board. The 16 KB RAM buffers sample blocks for windowed spectral analysis, and the 70 MIPS core sustains real-time filtering at tens of kilosamples per second. Output results stream over UART or SPI to host systems. This integration shortens the analog chain, reduces noise pickup, and allows filter coefficients to be updated in firmware for product-line calibration.
Recommended
Embedded Control with Connectivity (IoT Edge Nodes)
For IoT edge nodes that need local real-time control plus network reporting, the DSPIC33EP128GM306-I/PT couples 70 MIPS of local processing with multiple serial interfaces: two-to-four UARTs, SPI, and I2C buses connect to radio modules, Ethernet bridges, and security ICs. The DSP core performs local analytics - vibration signature checks, power-metering computations, or control decisions - before sending summarized data upstream, reducing network traffic and latency. The 3.3V supply matches common radio-module logic levels directly. Flash-based firmware with in-circuit programming supports over-the-air style updates staged through an external SPI Flash. Peripherals such as input capture and output compare handle pulse-based metering inputs natively, while the industrial temperature grade covers unconditioned outdoor and rooftop installations.
Recommended
Test and Measurement Instruments
Bench and portable instruments exploit the DSPIC33EP128GM306-I/PT's deterministic timing and DSP math. Input-capture channels timestamp events with core-clock resolution for frequency counters and interval analyzers, while output compares generate precise stimulus pulses for sensor excitation and component testing. The DSP core executes FFT, averaging, and calibration math at 70 MIPS, enabling real-time display updates on handheld DMM-style products. The 12 PWM channels with dead-time serve as adjustable duty-cycle sources for power-supply characterization fixtures, and the op-amps buffer measurement inputs. UART and USB-bridge connections (via external UART-USB ICs) stream results to PCs. The 64-TQFP's rich pin count provides enough parallel GPIO for switch matrices, relay banks, and front-panel controls on a single controller.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GM306-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP128GM306-E/PT | DSPIC33EP128GM304T-I/PT | DSPIC33EP128GM302-I/PT | DSPIC33EP256GM306-I/PT |
|---|---|---|---|---|---|
| Package | 64-TQFP (10x10 mm) | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| CPU Speed | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS |
| Flash Memory | 128 KB | 128 KB | 128 KB | 128 KB | 256 KB |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +125C (Extended) | -40C to +85C (Industrial) | -40C to +85C (Industrial) | -40C to +85C (Industrial) |
| Motor-Control PWM / Op-Amps | 12 MC PWM, on-chip op-amps | 12 MC PWM, on-chip op-amps | Reduced PWM/op-amp instances | Further reduced peripheral set | 12 MC PWM, on-chip op-amps |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
Key Differentiators
- Full GM-series peripheral complement with on-chip op-amps (vs DSPIC33EP128GM302-I/PT)
- Extended-temperature pin-compatible variant available (vs DSPIC33EP128GM306-E/PT)
- Same-pinout Flash upgrade path (vs DSPIC33EP256GM306-I/PT)
Design Notes
Connect all VDD and VSS pin pairs on the 64-TQFP package; the dsPIC33E core will not reliably program or run with any supply pin left floating. Place a 100 nF ceramic decoupling capacitor at each VDD/VSS pair, as close to the pins as possible, plus bulk 10 uF near the device. The 10x10 mm TQFP exposes the die via lead-frame only, so a solid ground plane on layer 2 provides return paths and EMI containment for the 70 MIPS internal clock domain.
For in-circuit serial programming (ICSP), the dsPIC33EP128GM306 provides multiple PGECx/PGEDx pin pairs, and the chosen pair must be used strictly as a pair - PGEC2 for ICSPCLK requires PGED2 for ICSPDAT. Route the selected pair to the programming header and keep them free of other functions in the final design, or ensure the circuit does not load them during programming. Mixing pins from different pairs is a common bring-up failure documented in programming-tool support notes.
Operate from a clean 3.3V rail with attention to analog supply quality: the on-chip op-amps and ADC share internal analog resources, so switching-noise coupled into AVDD degrades conversion accuracy in motor-control current loops. Estimated: at 70 MIPS the core draws tens of milliamps; budget the 3.3V regulator headroom accordingly and sequence the rail monotonically. Ferrite bead isolation between digital and analog supply feeds improves ADC results in high-PWM-noise environments.
Compliance Information
RoHS compliance per standard Microchip listing on distributor sites. AEC-Q100 qualification not stated in provided data; the -E/PT extended-temperature variant exists but explicit Q1 qualification is not confirmed in the source data.