LPC2387FBD100K - 72MHz ARM7 MCU, 512KB Flash | NXP
MPN: LPC2387FBD100K ✓ ActiveLPC2387FBD100K Overview
An Arm7 microcontroller is a 32-bit RISC embedded processor designed around the ARM7TDMI-S architecture, which combines an efficient instruction set with an integrated memory interface and accelerator functions. Within the broader semiconductor hierarchy, the LPC2387 belongs to the microcontroller class, sits above the Arm7 CPU core, and operates as the central control component in an embedded system. Its combination of memory and communications peripherals makes it suitable for connected industrial, medical, and communications equipment.
The LPC2387's 128-bit memory interface and accelerator architecture support 32-bit code execution at the maximum CPU frequency. Its 512 KB flash provides on-chip program storage, while 98 KB of SRAM supports working memory for protocol handling, buffers, and real-time control tasks. A 10-bit ADC and 10-bit DAC also allow the device to interface directly with analog sensors and output signals without requiring external converters in suitable designs.
Connectivity is a major strength. The Ethernet MAC, USB 2.0 interfaces, CAN channels, UARTs, SPI/SSP buses, and I2C buses allow the LPC2387 to consolidate several communications functions on one controller. Two PWM channels and four general-purpose timers support motor, lighting, and periodic timing functions. Real-time emulation and ISP/IAP capabilities also assist development, production programming, and field firmware updates.
Typical uses include industrial Ethernet controllers, CAN-connected automation equipment, USB-to-serial and protocol bridges, medical monitoring systems, and embedded data-acquisition units. The 100-pin LQFP package exposes the extensive set of GPIO and high-speed interface pins needed by these applications. Its 3 V operating range is suitable for conventional 3.3 V embedded systems when appropriate decoupling and signal-integrity practices are followed.
Designers should preserve the supply-voltage and decoupling requirements in the manufacturer datasheet, assign Ethernet and USB signals with controlled-impedance routing, and confirm that every external signal remains within its operating limits. Firmware replacement should also account for differences in memory organization and peripheral availability rather than assuming that a processor with a similar pin arrangement is functionally interchangeable.
This product page combines the LPC2387FBD100K architecture, interface inventory, package information, sourcing guidance, and verified pin-compatible alternatives with practical guidance for evaluating an industrial embedded-controller design. It highlights where the LPC2387 is strongest and where a replacement may require firmware or peripheral-level verification.
Drop-in alternatives for LPC2387FBD100K — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with LPC2387FBD100K (same form factor and footprint) — differing in Package.
LPC2368FBD100K
✅ Drop-InContact for price
View Datasheet →LPC176xFDB100
✅ Drop-In📋 Reference alternative (not in catalog)
LPC2387FBD100K Maximum Ratings & Electrical Characteristics
| CPU Core | Arm7TDMI-S |
| Architecture | 16-bit/32-bit ARM RISC |
| Maximum CPU Frequency | 72 MHz |
| Program Memory | 512 KB flash |
| RAM | 98 KB |
| Memory Interface Width | 128 bit |
| Ethernet | 1 Ethernet MAC |
| USB Interface | USB 2.0 Device, Host, and OTG |
| CAN Interface | 2 CAN channels |
| UART Interface | 4 UARTs |
| SPI/SSP Interface | 3 SSP/SPI interfaces |
| I2C Interface | 3 I2C interfaces |
| ADC | 8-channel, 10-bit |
| DAC | 1-channel, 10-bit |
| PWM | 2 PWM channels |
| Timers | 4 general-purpose timers |
| Supply Voltage Range | 3 V to 3.6 V |
| Operating Temperature | -40 °C to 85 °C |
| Package | 100-pin LQFP |
| Packaging | Tray |
| Programming and Debug | ISP/IAP and real-time emulation |
LPC2387FBD100K 100-pin lqfp Pin Configuration Guide
Pin configuration for LPC2387FBD100K (100-pin lqfp package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for LPC2387FBD100K.
Refer to the datasheet for full pin configuration.
Typical Applications
LPC2387FBD100K is suitable for 6 applications: Industrial Ethernet Controllers, CAN Networked Automation Equipment, USB Connectivity and Protocol Bridges, Medical Monitoring Equipment, Embedded Data-Acquisition Systems, Motor and Lighting Control.
Industrial Ethernet Controllers
The LPC2387FBD100K fits industrial Ethernet controllers because it combines an Ethernet MAC with a 72 MHz Arm7TDMI-S processor and 98 KB of SRAM. Firmware can maintain protocol stacks, process control state, diagnostics, and local data buffering without an additional host processor. Its 3 V to 3.6 V operating range aligns with conventional 3.3 V equipment, while four UARTs and three I2C buses support local sensors and service interfaces. The -40 °C to 85 °C rating suits industrial temperature classes. A practical design should use the manufacturer's Ethernet clock, magnetics, controlled-impedance routing, isolation, and surge-protection guidance rather than treating the integrated MAC as a complete physical-layer solution.
CAN Networked Automation Equipment
The two CAN channels and 72 MHz Arm7TDMI-S core make the LPC2387FBD100K appropriate for CAN-connected automation, monitoring, and motion-control equipment. It can support two independent CAN network segments or use one channel for control and the other for diagnostics. The 512 KB flash provides room for communications firmware, while 98 KB of SRAM supports message queues and application data. Its four UARTs and three I2C interfaces can coexist with CAN for local configuration and sensor access. Design the transceiver interface, termination, isolation, and protection separately, and validate bit timing, fault recovery, and bus-node startup against the CAN requirements of the target installation.
USB Connectivity and Protocol Bridges
The LPC2387FBD100K integrates USB 2.0 Device, Host, and OTG capability, making it useful for USB-to-serial, USB-to-CAN, USB-to-Ethernet, and industrial protocol bridges. Its 72 MHz processor can service multiple protocol layers and device-control tasks, while 512 KB of flash stores bootloader and application code. The four UARTs and three SSP/SPI interfaces allow legacy or external converters to be integrated into the same design. USB implementation still requires correct data-routing, pull-resistor, signal-conditioning, and connector decisions. Firmware should include enumeration handling, suspend and resume behavior, and robust control-transfer processing, with USB timing and electrical compliance checked against the applicable product requirements.
Medical Monitoring Equipment
The LPC2387FBD100K can serve as the supervisory controller in medical monitoring equipment when its integrated Ethernet, USB, CAN, serial interfaces, ADC, and DAC simplify the system architecture. The 10-bit ADC supports monitoring of selected analog inputs, while the 72 MHz processor can coordinate sampling, filtering, alarm logic, and communications. The 3 V to 3.6 V supply range and -40 °C to 85 °C operating rating support many embedded platforms. For actual medical use, engineers must establish the applicable device qualification, isolation, electrical-safety, EMC, and risk-management requirements. Analog front-end design, sensor accuracy, calibration, and patient-safety isolation remain separate system responsibilities and should not be inferred from the microcontroller specifications.
Embedded Data-Acquisition Systems
The LPC2387FBD100K is appropriate for compact data-acquisition systems that combine analog measurement with Ethernet, USB, or CAN reporting. Its 8-channel 10-bit ADC can acquire multiple inputs, while the DAC can generate a reference or test output. With 512 KB of flash, 98 KB of SRAM, and a 72 MHz CPU, the controller can perform filtering, calibration, timestamping, and local buffering before forwarding data through a communications interface. Four UARTs and three I2C channels permit connection to sensors and external converters. The ADC and DAC should be treated as 10-bit conversion peripherals, so precision requirements, input noise, reference quality, sampling strategy, and analog front-end design must be verified independently of the microcontroller's digital capabilities.
Motor and Lighting Control
The LPC2387FBD100K can control industrial lighting, pumps, valves, and compact motor systems using its two PWM channels and four general-purpose timers. Deterministic timer resources are useful for periodic control tasks, while the 72 MHz Arm7TDMI-S processor leaves capacity for supervisory logic and communications. The 100-pin LQFP provides access to the required timer outputs, GPIO, serial buses, and analog inputs in a surface-mount design. Power conversion, gate driving, current sensing, and overcurrent protection are external to the microcontroller. Engineers should establish PWM frequency and resolution from the actuator requirements, include deterministic fault handling, and verify timing behavior under the worst-case interrupt load and operating temperature.
Engineering reference data for LPC2387FBD100K — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | LPC2368FBD100K | LPC176xFDB100 |
|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 100-pin LQFP | 100-pin LQFP | 100-pin LQFP |
Key Differentiators
- Established Arm7TDMI-S platform with extensive integrated connectivity (vs LPC176xFDB100)
- Broader family feature set for connected embedded designs (vs LPC2368FBD100K)
- Original ordering option reduces migration risk (vs LPC176xFDB100)
Design Notes
Design the LPC2387FBD100K supply for the 3 V to 3.6 V range specified by NXP. Place the required local bypass capacitors at the supply and ground pins using the shortest possible traces, and use a low-impedance ground plane to reduce return-path inductance. Confirm regulator headroom, startup sequencing, and the worst-case current demand for enabled Ethernet, USB, CAN, timers, and analog peripherals rather than relying on a nominal current figure.
Route Ethernet and USB signals as controlled-impedance interconnects and keep them away from switching nodes and noisy digital return paths. Provide the external clock components, termination, and interface components in the positions recommended by the manufacturer datasheet. Because the LQFP package has fine-pitch leads, inspect solder-joint coverage, solder-paste distribution, and via-in-pad or via-adjacent construction during the first article to reduce shorts between adjacent pins.
Do not treat a similar package or pin-to-pin mapping as proof of drop-in firmware compatibility. The LPC176xFDB100 mapping changes the processor architecture to Cortex-M3 and may require replacing the SD/MMC function with SPI or SSP. For LPC2368FBD100K, verify memory size, Ethernet and USB operation, peripheral pin functions, startup code, drivers, and interrupt mappings. A hardware fit check must be followed by boot, communication, analog, timing, and production-programming tests.
Use the ISP/IAP and real-time-emulation facilities only after implementing the production security and update policy required by the end product. Protect firmware from unintended writes, define rollback behavior after interrupted updates, and ensure the external programming interface cannot compromise application integrity. The 512 KB flash and 98 KB SRAM allocations must also be mapped against the actual bootloader, operating system, and application memory requirements.
Compliance Information
No definitive RoHS, REACH, lead-free, halogen-free, or conflict-minerals statement was identified for the exact ordering code. Automotive qualification is not established; use the not_applicable classification because this industrial microcontroller ordering code is not identified as an AEC-Q100 variant.
