LTC2258CUJ-12 - 12-Bit 65Msps 1.8V Ultra-Low Power ADC | ADI
MPN: LTC2258CUJ-12 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $32.5 | $32.50 |
| 10 | $29.2 | $292.00 |
| 100 | $25.8 | $2,580.00 |
| 500 | $22.45 | $11,225.00 |
| 1,000 | $19.95 | $19,950.00 |
LTC2258CUJ-12 Overview
An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples a continuous-time analog input voltage and converts each sample into a discrete digital code. Pipelined ADCs such as the LTC2258-12 use multiple low-resolution stages to achieve high sample rates at moderate power, placing them in the converter hierarchy between successive-approximation (SAR) ADCs and flash ADCs. They are widely used in communications, instrumentation, and defense systems where gigahertz-class analog front-ends must be digitized accurately.
Key specifications include 71.1 dB SNR and 88 dB spurious-free dynamic range (SFDR) for AC applications, 0.3 LSB RMS transition noise, ±0.3 LSB INL (typical) and ±0.1 LSB DNL (typical), with no missing codes over the full operating temperature range. Ultralow 0.17 ps RMS aperture jitter enables excellent undersampling of IF frequencies. Selectable digital outputs include full-rate CMOS, double-data-rate CMOS, or double-data-rate LVDS, while a separate output supply rail lets the CMOS swing range from 1.2V to 1.8V for flexible logic-level interfacing.
The converter features an optional clock duty-cycle stabilizer, shutdown and nap modes for power-sensitive applications, and a serial SPI port for mode configuration. The 40-pin 6×6 mm QFN package provides a compact footprint with excellent thermal performance, while the single 1.8V supply dramatically simplifies system power-tree design for portable, battery-powered, and high-density designs.
Typical applications include cellular base-station receivers, IF sampling for software-defined radios, digital oscilloscopes, spectrum analyzers, medical imaging front-ends, and high-speed data acquisition cards. The combination of 71.1 dB SNR, 88 dB SFDR, and 0.17 ps RMS jitter makes the part particularly suitable for undersampling architectures in communications receivers.
When designing with this ADC, ensure the analog input is driven by a low-noise, low-distortion differential amplifier with bandwidth well above the Nyquist frequency, and that the clock source provides <0.5 ps RMS jitter to preserve SNR. Use a low-inductance ground plane and keep analog/digital domains partitioned to avoid digital coupling into the analog inputs.
This page synthesizes distributor pricing, drop-in pin-compatible alternatives, and practical PCB/clock design notes that are not aggregated in the manufacturer datasheet.
Drop-in alternatives for LTC2258CUJ-12 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with LTC2258CUJ-12 (same form factor and footprint) — differing in Package, Resolution, Sample Rate, Operating Temperature, DNL (typical).
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
LTC2259CUJ-12
✅ Drop-In📋 Reference alternative (not in catalog)
LTC2257CUJ-12
✅ Drop-In✓ In Stock
$16.8 / Unit
View Datasheet →LTC2256CUJ-14
✅ Drop-In✓ In Stock
$6.9 / Unit
View Datasheet →LTC2258IUJ-12
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$28.2 / Unit
View Datasheet →LTC2268CUJ-12
✅ Drop-In📋 Reference alternative (not in catalog)
LTC2258CUJ-12 Maximum Ratings & Electrical Characteristics
| Resolution | 12 bits |
| Sample Rate | 65 Msps |
| Architecture | Pipelined |
| Number of Inputs | 1 |
| Input Type | Differential (single-ended compatible) |
| Supply Voltage | 1.8 V (single supply) |
| Output Supply Range | 1.2 V to 1.8 V |
| Output Interface | CMOS / DDR CMOS / DDR LVDS (selectable) |
| SNR | 71.1 dB |
| SFDR | 88 dB |
| INL (typical) | ±0.3 LSB |
| DNL (typical) | ±0.1 LSB |
| Transition Noise | 0.3 LSB RMS |
| Aperture Jitter | 0.17 ps RMS |
| Missing Codes | No missing codes over temperature |
| Operating Temperature | 0C to +70C (commercial grade, CUJ suffix) |
| Package | 40-pin QFN (6 mm × 6 mm) |
| Mounting Type | Surface Mount |
| Configuration Interface | SPI serial port |
| Power-Saving Modes | Shutdown, Nap |
| RoHS Status | Compliant (PBF suffix) |
LTC2258CUJ-12 Pin Configuration
| Pin 1 | AIN+ — Differential analog input positive |
| Pin 2 | AIN- — Differential analog input negative |
| Pin 3 | VCM — Common-mode voltage output (bias for input) |
| Pin 4 | REF — Reference voltage decoupling |
| Pin 5 | AVDD — 1.8V analog supply |
| Pin 6 | GND — Analog ground |
| Pin 7 | CLK+ — Differential clock input positive |
| Pin 8 | CLK- — Differential clock input negative |
| Pin 9 | SENSE — Reference/configuration pin |
| Pin 10 | OGND — Output ground |
| Pin 11 | OVDD — Output supply (1.2V to 1.8V) |
| Pin 12 | D11 — CMOS data output bit 11 (MSB) |
| Pin 13 | D10 — CMOS data output bit 10 |
| Pin 14 | D9 — CMOS data output bit 9 |
| Pin 15 | D8 — CMOS data output bit 8 |
| Pin 16 | D7 — CMOS data output bit 7 |
| Pin 17 | D6 — CMOS data output bit 6 |
| Pin 18 | D5 — CMOS data output bit 5 |
| Pin 19 | D4 — CMOS data output bit 4 |
| Pin 20 | D3 — CMOS data output bit 3 |
| Pin 21 | D2 — CMOS data output bit 2 |
| Pin 22 | D1 — CMOS data output bit 1 |
| Pin 23 | D0 — CMOS data output bit 0 (LSB) |
| Pin 24 | DRVDD — LVDS output supply when used |
| Pin 25 | NC — Not connected (per datasheet) |
| Pin 26 | NC — Not connected (per datasheet) |
| Pin 27 | OGND — Output ground |
| Pin 28 | OVDD — Output supply (1.2V to 1.8V) |
| Pin 29 | CS — SPI chip select (active low) |
| Pin 30 | SCK — SPI serial clock |
| Pin 31 | SDI — SPI serial data input |
| Pin 32 | SDO — SPI serial data output |
| Pin 33 | MODE — Output mode select (CMOS/DDR CMOS/DDR LVDS) |
| Pin 34 | DCS — Duty cycle stabilizer enable |
| Pin 35 | SHDN — Shutdown control (active high) |
| Pin 36 | NAP — Nap mode control |
| Pin 37 | AVDD — 1.8V analog supply |
| Pin 38 | GND — Analog ground |
| Pin 39 | REF — Reference voltage decoupling |
| Pin 40 | VCM — Common-mode voltage bypass |
Typical Applications
LTC2258CUJ-12 is suitable for 7 applications: Cellular Base-Station Receiver IF Digitization, Software-Defined Radio (SDR) Wideband Receiver, Digital Oscilloscope and Spectrum Analyzer Front-End, Medical Imaging and Ultrasound Front-End, High-Speed Data Acquisition Card, Radar and Electronic Warfare Receiver, Industrial Non-Destructive Testing (NDT) Ultrasonic Imaging.
Cellular Base-Station Receiver IF Digitization
The LTC2258CUJ-12 is well suited for digitizing the IF stage of cellular base-station receivers where wide dynamic range and low jitter are essential. Its 71.1 dB SNR, 88 dB SFDR, and 0.17 ps RMS aperture jitter allow accurate undersampling of IF frequencies in the 70-200 MHz range, eliminating a second downconversion stage and simplifying the receiver chain. The 65 Msps sample rate comfortably covers 4G LTE and early 5G channel bandwidths. The 1.8V single supply and selectable DDR LVDS outputs ease integration with FPGAs, while shutdown/nap modes help meet the power budget of macro and small-cell base stations.
Recommended
Software-Defined Radio (SDR) Wideband Receiver
The LTC2258CUJ-12 enables direct sampling of low-IF and high-IF signals in software-defined radio platforms. With 0.17 ps RMS aperture jitter, the converter preserves SNR when undersampling IFs at 100+ MHz, while 88 dB SFDR keeps spurious content well below the noise floor of weak signals. The 12-bit resolution and 65 Msps throughput suit digitizing 25 MHz wide channels for downstream DSP. Selectable DDR CMOS or LVDS outputs allow direct connection to common SDR FPGA platforms, and the SPI configuration port simplifies mode changes for multi-band operation across HF, VHF, and UHF.
Recommended
Digital Oscilloscope and Spectrum Analyzer Front-End
The LTC2258CUJ-12 serves as a high-performance digitizer in mid-range digital oscilloscopes and spectrum analyzers where 12-bit vertical resolution and 65 Msps sample rate provide excellent signal fidelity. The 0.3 LSB RMS transition noise ensures clean triggering, while 71.1 dB SNR supports accurate amplitude measurements. The selectable DDR CMOS/LVDS outputs allow high-speed data transfer to the FPGA or DSP back-end, and the small 40-pin 6×6 mm QFN package helps minimize front-end board area in 4-channel designs. Industrial designers often pair two LTC2258CUJ-12 channels for interleaved 130 Msps operation.
Recommended
Medical Imaging and Ultrasound Front-End
The LTC2258CUJ-12 fits ultrasound and medical imaging front-ends where wide dynamic range and low noise floor are required to capture small echoes alongside larger reflections. The 88 dB SFDR ensures harmonic and spurious content does not mask weak signals, while 71.1 dB SNR supports high-contrast imaging. The 1.8V single supply is ideal for portable and cart-based ultrasound systems, and the SPI port enables mode-of-operation changes between B-mode, Doppler, and elastography scans. Power-saving shutdown and nap modes help meet energy-channel-channel designs.
Recommended
High-Speed Data Acquisition Card
The LTC2258CUJ-12 is a strong fit for PCIe-based and PXIe data acquisition cards that require 12-bit precision at 65 Msps per channel. The 40-pin 6×6 mm QFN allows dense multi-channel layouts, while DDR LVDS outputs support high-throughput transfer to on-board FPGAs or DSPs. The 0.17 ps jitter preserves timing accuracy for time-domain measurements, and the configurable clock duty-cycle stabilizer relaxes source-clock requirements. Multiple LTC2258CUJ-12 parts can be synchronized for simultaneous sampling in multi-channel test systems.
Recommended
Radar and Electronic Warfare Receiver
The LTC2258CUJ-12 enables wideband IF digitization in radar warning receivers and electronic support measures where SFDR and jitter directly determine threat-detection accuracy. The 88 dB SFDR prevents strong interferers from masking weaker threat signals, and 0.17 ps RMS jitter enables accurate frequency estimation on pulsed radar returns. Selectable DDR LVDS outputs interface directly to FPGA-based digital downconverters, while the small 40-pin QFN and single 1.8V supply suit size, weight, and power (SWaP)-constrained airborne platforms.
Recommended
Industrial Non-Destructive Testing (NDT) Ultrasonic Imaging
The LTC2258CUJ-12 fits industrial ultrasonic flaw detectors and NDT imaging systems where 12-bit resolution and 65 Msps sampling capture wideband echo responses with sufficient dynamic range. The 1.8V supply and shutdown mode simplify battery-powered portable flaw-detector designs, while the SPI port allows runtime mode reconfiguration for different probe frequencies. The 88 dB SFDR preserves flaw signature fidelity against transducer ring-down artifacts, making the LTC2258CUJ-12 a strong fit for phased-array and TOFD inspection systems.
Recommended
Recommended Products Summary
Engineering reference data for LTC2258CUJ-12 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | LTC2259CUJ-12 | LTC2257CUJ-12 | LTC2256CUJ-14 | LTC2258IUJ-12 | LTC2268CUJ-12 |
|---|---|---|---|---|---|---|
| Package | 40-pin QFN (6x6 mm) | 40-pin QFN (6x6 mm) - same | 40-pin QFN (6x6 mm) - same | 40-pin QFN (6x6 mm) - same | 40-pin QFN (6x6 mm) - same | 40-pin QFN (6x6 mm) - same |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 12 bits | 14 bits | 12 bits | 14 bits | 12 bits | 12 bits |
| Sample Rate | 65 Msps | 65 Msps | 40 Msps | 25 Msps | 65 Msps | 125 Msps |
| SNR | 71.1 dB | 73 dB | 71.1 dB | 73 dB | 71.1 dB | 71.1 dB |
| SFDR | 88 dB | 88 dB | 88 dB | 88 dB | 88 dB | 85 dB |
| Aperture Jitter | 0.17 ps RMS | 0.17 ps RMS | 0.17 ps RMS | 0.17 ps RMS | 0.17 ps RMS | 0.17 ps RMS |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (Commercial) | 0C to +70C (Commercial) | 0C to +70C (Commercial) | -40C to +85C (Industrial) | 0C to +70C (Commercial) |
| Supply Voltage | 1.8V single | 1.8V single | 1.8V single | 1.8V single | 1.8V single | 1.8V single |
Key Differentiators
- Highest speed (65 Msps) in 12-bit pin-compatible family (vs LTC2257CUJ-12)
- Pin-compatible upgrade path to 14-bit (vs LTC2259CUJ-12)
- Ultra-low 0.17 ps RMS aperture jitter (vs LTC2268CUJ-12)
Design Notes
Partition the PCB into analog and digital domains and use a continuous unbroken ground plane under the QFN. Place AVDD and OVDD decoupling capacitors (10 uF bulk + 0.1 uF + 1 nF HF) within 2 mm of their respective supply pins. The exposed pad (EP) of the 40-pin QFN must be soldered to a low-impedance analog ground pour with at least 8 thermal vias to inner ground layers for proper heat sinking and electrical grounding.
Drive the analog input with a low-noise, low-distortion differential amplifier (e.g., AD8138, AD8139, ADA4932) with bandwidth at least 3× the maximum input frequency. Keep input traces impedance-matched (typically 100 ohm differential) and length-matched within 0.5 mm to preserve common-mode rejection. The LTC2258CUJ-12 expects a 1.5 Vp-p differential input swing around the VCM reference for full-scale operation.
Clock source jitter directly degrades ADC SNR according to SNR = 20*log10(1/(2π*Fin*jitter)). For a 70 MHz IF input with 65 Msps sampling, use a clock source with <0.5 ps RMS jitter to preserve the 71.1 dB SNR rating - a low-cost crystal oscillator is usually inadequate. Always enable the on-chip clock duty-cycle stabilizer when using single-ended CMOS clock sources to avoid SNR loss from duty-cycle error.
Estimated: at 65 Msps with a 1.8V analog supply drawing ~70 mA (typical, per datasheet), the LTC2258CUJ-12 dissipates approximately 0.126 W. In shutdown mode the supply current drops to <1 mA and in nap mode to ~20 mA. Use a linear LDO (e.g., LT3042 or LT1761) rather than a switching converter for AVDD to avoid injecting switching noise into the analog input path.
The SPI configuration port (CS, SCK, SDI, SDO) should be routed away from analog input and clock traces, and tied off with a known logic state if unused (e.g., CS pulled high). When using DDR LVDS outputs, maintain 100 ohm differential impedance on each output pair and length-match within 0.5 mm to avoid intra-pair skew that violates the LVDS setup/hold window at 65 Msps.
Compliance Information
RoHS compliance indicated by #PBF suffix on the part number. The bare LTC2258CUJ-12 (without PBF) is the legacy SnPb leaded version for aerospace/defense applications. AEC-Q100 not applicable - this is a high-speed precision ADC intended for industrial, communications, and instrumentation applications rather than automotive.
