MAX11903ETP+T - 18-Bit 1.6Msps SAR ADC | Analog Devices
MPN: MAX11903ETP+T ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $12.8 | $12.80 |
| 10 | $11.55 | $115.50 |
| 100 | $10.4 | $1,040.00 |
| 500 | $9.45 | $4,725.00 |
| 1,000 | $8.8 | $8,800.00 |
MAX11903ETP+T Overview
A SAR (Successive-Approximation Register) ADC is a class of Nyquist-rate converter that resolves one bit per internal clock cycle using a capacitive charge-redistribution DAC and a comparator. SAR ADCs sit at the boundary between precision (sigma-delta) and high-speed (pipelined/folding) converters, combining low latency (one conversion cycle), deterministic behavior, and excellent DC accuracy without the digital decimation filters of sigma-delta parts. They are the workhorse for multiplexed data-acquisition systems, industrial sensors, and digital control loops where single-shot latency matters.
The MAX11903ETP+T delivers best-in-class power consumption that scales linearly with throughput, meaning current draw at 100 ksps is roughly 1/16 of the current at 1.6 Msps. Internal reference buffers eliminate the need for external high-current reference drive circuitry, simplifying the BOM and reducing PCB area. The unipolar differential ±VREF input range allows direct interface to bridge sensors, current-shunt monitors, and differential audio signals after scaling.
Internally, the device uses a 1.8 V analog core supply plus a 3.3 V reference-buffer supply; the split rail minimizes digital noise coupling into the sensitive analog front-end. An integrated high-impedance input structure accepts true bipolar differential signals when biased around a common-mode voltage, supporting direct connection to bridge sensors and instrumentation outputs.
Typical applications include precision industrial data acquisition, weigh scales and load-cell digitizers, motor-control current sensing, medical instrumentation signal chains, and multi-channel multiplexed sensor systems. The serial SPI-compatible output and small TQFN footprint make it equally at home in dense multi-channel boards.
When designing with this ADC, take care with the reference decoupling: place 10 µF ceramic + 0.1 µF NF bypass right at the REF pins and use a star-ground topology to keep digital return currents out of the analog ground. Input common-mode biasing matters - set IN+ and IN- around VREF/2 for maximum dynamic range on differential signals.
This page synthesizes distributor pricing, drop-in alternatives drawn from the Site MPN list, and practical design notes that go beyond the manufacturer datasheet's electrical tables alone.
Drop-in alternatives for MAX11903ETP+T — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with MAX11903ETP+T (same form factor and footprint) — differing in Architecture, Input Type, Package, Resolution, RoHS Status.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
MAX11903ETP+
✅ Drop-In📋 Reference alternative (not in catalog)
MAX11903ETP+T Maximum Ratings & Electrical Characteristics
| Resolution | 18 bits |
| Number of Channels | 1 |
| Architecture | SAR (Successive-Approximation Register) |
| Sampling Rate (max) | 1.6 Msps |
| Input Type | Fully Differential, Unipolar ±VREF |
| Input Range | ±VREF differential |
| Reference Buffers | Internal (external reference not required) |
| Digital Interface | SPI-compatible serial |
| Analog Supply Voltage | 3.3 V |
| Core Supply Voltage | 1.8 V |
| Operating Temperature Range | -40 °C to +85 °C |
| Package | 20-pin TQFN (4 mm x 4 mm), exposed pad |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Lead-Free | Yes |
| Power Scaling | Scales linearly with throughput |
MAX11903ETP+T Pin Configuration
| Pin 1 | REF — Reference input/output (decouple to AGND) |
| Pin 2 | REFGND — Reference ground return |
| Pin 3 | AIN+ — Positive analog input |
| Pin 4 | AIN- — Negative analog input |
| Pin 5 | AGND — Analog ground |
| Pin 6 | AVDD — 3.3 V analog supply (reference buffer) |
| Pin 7 | DVDD — 1.8 V digital core supply |
| Pin 8 | DGND — Digital ground |
| Pin 9 | CNVST — Conversion start input (active low) |
| Pin 10 | SDO — Serial data output |
| Pin 11 | SDIO — Serial data input/output |
| Pin 12 | SCLK — Serial clock input |
| Pin 13 | CS — Chip select (active low) |
| Pin 14 | RESET — Reset input (active low) |
| Pin 15 | PD — Power-down input (active high) |
| Pin 16 | OVDD — I/O supply (1.8 V or 3.3 V) |
| Pin 17 | DNC — Not connected (per datasheet) |
| Pin 18 | DNC — Not connected (per datasheet) |
| Pin 19 | DNC — Not connected (per datasheet) |
| Pin 20 | EP — Exposed thermal pad (connect to AGND) |
Typical Applications
MAX11903ETP+T is suitable for 7 applications: Precision Weigh Scale / Load-Cell Digitizer, Industrial Multi-Channel Data Acquisition, Motor Control Current Sensing, Medical Instrumentation Signal Chain, Audio Signal Acquisition and Digital Crossover, Vibration and Condition Monitoring, Test and Measurement Instrumentation.
Precision Weigh Scale / Load-Cell Digitizer
The MAX11903ETP+T's 18-bit resolution (262 144 codes) and fully differential ±VREF input make it ideal for direct digitization of strain-gauge bridge outputs in commercial and industrial weigh scales. The 1.6 Msps sampling rate allows 100x digital oversampling and averaging to push effective resolution toward 20 bits while rejecting 50/60 Hz mains interference via FIR digital post-processing. Internal reference buffers eliminate the external REF drive circuitry typical of legacy SAR parts, shrinking the load-cell analog front-end to just signal conditioning plus the ADC. Designers place the bridge directly across IN+/IN- biased at VREF/2 and decimate the 1.6 Msps output stream to ~100 samples/sec post-FIR; the differential architecture rejects ground-loop noise from long load-cell cable runs.
Recommended
Industrial Multi-Channel Data Acquisition
The MAX11903ETP+T provides deterministic single-cycle latency ideal for multiplexed multi-channel DAQ front-ends where each channel must settle within the same conversion cycle. The 1.6 Msps sampling budget supports 16 channels at 100 ksps/channel with comfortable settling margin for 4-wire RTD or thermocouple inputs through a low-leakage MUX. The SPI-compatible serial interface accepts 8/16/24-bit host processors and DSPs. The full differential ±VREF input accepts bipolar signals after biasing, simplifying signal-chain design versus single-ended ADCs that require external instrumentation amplifiers per channel.
Recommended
Motor Control Current Sensing
In FOC motor control loops, the MAX11903ETP+T samples phase currents with sub-microsecond latency, enabling the current loop to close within one PWM period without the multi-cycle delay of sigma-delta ADCs. The 18-bit resolution provides 0.004 % measurement granularity adequate for 400 Hz torque ripple analysis and field-weakening observer algorithms. Differential inputs accept shunt-monitor outputs from current-sense amplifiers such as the MAX4080 or INA240 with no instrumentation front stage. At 1.6 Msps the ADC easily resolves the 20 kHz PWM carrier frequency above the Nyquist limit with margin to spare, while the 1.8 V analog core rail minimizes switching losses in compact inverter designs.
Recommended
Medical Instrumentation Signal Chain
The MAX11903ETP+T's 18-bit resolution, low power consumption that scales with throughput, and small TQFN package suit portable medical devices such as patient monitors, pulse oximeters, and ECG front-ends where both resolution and battery life matter. The internal reference buffers simplify the BOM versus SAR parts that require an external low-noise reference, reducing leakage risk in low-side power designs. At low sample rates (e.g., 1 kspo for ECG) the device consumes microamp-tier current, extending battery life in ambulatory designs. Differential inputs accept the output of instrumentation amplifiers such as the AD8226 or AD8422 directly with no extra signal conditioning.
Recommended
Audio Signal Acquisition and Digital Crossover
Beyond precision DC measurement, the MAX11903ETP+T's 1.6 Msps sampling rate and 18-bit dynamic range capture audio up to ~50 kHz for studio recording or digital crossover networks in pro-audio speakers. The fully differential input accepts balanced audio after biasing, providing >90 dB SNR typical of 16-bit audio while the extra 2 bits provide linearity headroom for the input stage. The SPI-compatible interface streams to DSPs such as the ADAU1452 or SHARC for real-time FIR crossover filtering. Compared with audio-specific delta-sigma codecs, the SAR's deterministic latency simplifies delay compensation for multi-driver line arrays.
Recommended
Vibration and Condition Monitoring
Industrial condition monitoring of rotating machinery (motors, pumps, bearings) uses the MAX11903ETP+T to digitize IEPE accelerometers and eddy-probe displacement sensors at rates up to 1.6 Msps, capturing vibration harmonics up to ~50 kHz envelope per Nyquist. The 18-bit dynamic range provides adequate signal headroom for envelope analysis and FFT spectral lines. Differential inputs reject common-mode ground noise from long sensor cable runs in motor housings. The SAR's deterministic latency simplifies time-synchronous averaging and reference-signal averaging algorithms used in bearing-defect frequency extraction.
Recommended
Test and Measurement Instrumentation
Bench-top DMMs, oscilloscope front-ends, and precision calibrators rely on the MAX11903ETP+T for digitizing the post-attenuator signal after ranging and anti-alias filtering. The 18-bit resolution delivers ~0.001 % full-scale accuracy needed for 6.5-digit DMM performance when calibrated against an external 10 V reference. The 1.6 Msps sampling rate supports waveform capture modes beyond DC measurement. Internal reference buffers minimize thermal drift and noise pickup that plague designs using external reference ICs.
Recommended
Recommended Products Summary
Engineering reference data for MAX11903ETP+T — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | MAX11903ETP+ | LTC2366ITS8 | LTC2344CUH-18 | LTC2360ITS8 |
|---|---|---|---|---|---|
| Package | 20-pin TQFN (4x4) | 20-pin TQFN (4x4) - identical footprint | TS8 (TSOT-23-8) - smaller package | 32-pin QFN (5x5) - larger package | TS8 (TSOT-23-8) - smaller package |
| Brand | Analog Devices | Analog Devices | Analog Devices (Linear Tech) | Analog Devices (Linear Tech) | Analog Devices (Linear Tech) |
| Resolution | 18 bits | 18 bits | 16 bits | 18 bits | 16 bits |
| Sampling Rate (max) | 1.6 Msps | 1.6 Msps | 3 Msps (higher) | 400 ksps (lower) | 100 ksps (lower) |
| Input Type | Fully Differential ±VREF | Fully Differential ±VREF | Pseudo-Differential | Differential/Single-Ended | Pseudo-Differential |
| Internal Reference Buffers | Yes | Yes | No | Yes | No |
| Architecture | SAR | SAR | SAR | SAR | SAR |
| Interface | SPI-compatible | SPI-compatible | SPI-compatible | SPI-compatible | SPI-compatible |
| Operating Temp Range | -40 to +85 °C | -40 to +85 °C | -40 to +85 °C | -40 to +85 °C | -40 to +85 °C |
Key Differentiators
- Internal reference buffers reduce BOM and simplify PCB layout (vs LTC2366ITS8)
- Higher sampling rate at same resolution (vs LTC2344CUH-18)
- 2 extra bits of resolution vs 16-bit SAR family (vs LTC2360ITS8)
Design Notes
Use a separate low-noise LDO for the 1.8 V analog supply; do not route the 1.8 V core from a switching regulator that shares the system power net. Place 1 µF X7R ceramic + 0.1 µF NP0 ceramic on AVDD and DVDD within 5 mm of the package pins. The 3.3 V reference-buffer rail must see its own ferrite or LDO so transients on the digital 3.3 V rail do not couple into REF and degrade linearity.
Split AGND and DGND into separate pours joined at a single star point below the exposed pad (EP). The exposed pad must be soldered to AGND with multiple vias (at least 5) to provide low thermal impedance for the internal reference buffer. Route the analog input traces as a differential pair with 50 ohm or 100 ohm controlled impedance - length-matched to within 0.5 mm to preserve CMRR. Keep SPI traces away from the analog input pair on the same PCB layer to avoid digital-noise coupling.
Common-mode biasing: set IN+ to VREF/2 with a 10 kohm + 10 kohm divider from REF to AGND for single-ended sources, giving maximum differential swing for bipolar signals. For true differential signals, bias both inputs at the source's common-mode voltage. Add 10 ohm series resistors between the input driver and IN+/IN- to isolate the front-end from ADC kickback on sample-and-hold transitions. Use a charge-bucket RC filter (10 ohm + 1 nF) as a last-stage bandwidth limiter before the ADC pins.
Do not exceed the absolute maximum ratings on AIN+/AIN- (typ. VREF + 0.3 V) or latch-up can occur. Avoid the layout antipattern of routing REF traces under digital switching signals. Do not skip CNVST-RESET sequencing during power-up - issue a RESET pulse of at least 50 ns after both supplies stabilize. The internal reference takes ~10 ms to settle after power-on; issue a CNVST at the programmed sample rate during calibration for first samples.
Compliance Information
RoHS compliant per Analog Devices product page. Not AEC-Q100 qualified - for automotive applications, look at the MAX11903A-grade automotive part. Halogen-free status not explicitly stated in the verified data and marked unknown.
