PIC18F25K40T-I/ML - 8-Bit 64MHz XLP MCU 32KB Flash | Microchip
MPN: PIC18F25K40T-I/ML ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.94 | $2.94 |
| 10 | $2.65 | $26.50 |
| 100 | $2.32 | $232.00 |
| 500 | $2.08 | $1,040.00 |
| 1,000 | $1.85 | $1,850.00 |
PIC18F25K40T-I/ML Overview
An 8-bit PIC microcontroller (MCU) is a Harvard-architecture microcontroller that executes instructions on 8-bit data paths and integrates Flash program memory, SRAM, peripherals and an oscillator into a single chip. Within the broader taxonomy, the PIC18F family sits between the lower-pin PIC16F series and the higher-performance dsPIC33/PIC24 families, and is part of Microchip's eXtreme Low Power (XLP) portfolio that targets battery-friendly designs with sub-uA sleep currents and nanoWatt technology.
Key differentiating specifications include 25 I/O pins, an internal 64 MHz oscillator, support for up to 1024 bytes of data EEPROM emulation in Flash, and 5V-tolerant digital I/O. The device family integrates CIP blocks like a Configurable Logic Cell (CLC), Complementary Waveform Generator (CWG) and Windowed Watchdog Timer (WWDT), which let hardware react to events without waking the CPU - a hallmark of the XLP value proposition. The 28-pin QFN package has a low thermal resistance path through the exposed pad.
Architecturally, the PIC18F25K40 uses a C-compiler-optimized RISC core with a single-cycle 8x8 hardware multiplier, 49 instruction types and a 16-level hardware stack, allowing deterministic interrupt response and efficient code density. The 32 KB self-programmable Flash supports runtime firmware updates via the bootloader-friendly ICSP interface.
Typical applications include low-power IoT sensor nodes, USB-CDC/HID human-interface devices, automotive body controllers, battery chargers, home appliances and general-purpose embedded control where the XLP current profile (e.g., 50 nA typical sleep with RTCC) is critical. Designers choose this part when balancing program memory headroom, peripheral mix and 28-pin QFN density.
When designing with this part, ensure the exposed thermal pad on pin 29 (the die-attach pad) is soldered to a properly grounded copper pour to meet thermal and electrical performance. Decoupling: place a 100 nF ceramic as close as possible to each VDD/VSS pair, plus a bulk 1 uF-10 uF on the main rail. Programming/debug uses the standard Microchip ICSP 2-wire interface on PGC/PGD.
This page synthesizes distributor pricing, drop-in alternatives, parametric comparison and practical design notes that are not aggregated on a single manufacturer datasheet page, helping engineers shorten sourcing decisions and BOM validation cycles.
Drop-in alternatives for PIC18F25K40T-I/ML — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC18F25K40T-I/ML (same form factor and footprint) — differing in Package, EEPROM, Program Memory (Flash), ADC, Communication.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC18F25K40-I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F25K40-E/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC18F26K40T-I/ML
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC18F24K40T-I/ML
✅ Drop-In✓ In Stock
$1.22 / Unit
View Datasheet →PIC18F25K40T-I/ML Maximum Ratings & Electrical Characteristics
| Manufacturer | Microchip Technology |
| Series | PIC® XLP™ 18K |
| Core Processor | PIC18F |
| Core Size | 8-bit |
| Max CPU Speed | 64 MHz |
| Program Memory (Flash) | 32 KB (16K x 16) |
| RAM | 2048 bytes |
| EEPROM | 256 bytes |
| Number of I/O | 25 |
| Supply Voltage (VDD) | 2.3 V to 5.5 V |
| Operating Temperature | -40C to +85C (industrial, 'I' suffix) |
| Package | 28-QFN (6x6 mm) with exposed pad |
| Mounting Type | Surface Mount |
| Packaging Option | Tape & Reel ('T' suffix) |
| Connectivity | I2C, SPI, UART/USART |
| Peripherals | CWG, WWDT, CRC/SCAN, CLC, ADC, PWM, Comparators |
| Data Converters | A/D 24x10b |
| Oscillator Type | Internal (64 MHz), External optional |
| RoHS Status | Compliant |
| MSL Level | 3 (per JEDEC J-STD-020, reflow at 260C) |
PIC18F25K40T-I/ML 28-qfn (6x6 mm) with exposed pad Pin Configuration Guide
Pin configuration for PIC18F25K40T-I/ML (28-qfn (6x6 mm) with exposed pad package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for PIC18F25K40T-I/ML.
Refer to the datasheet for full pin configuration.
Typical Applications
PIC18F25K40T-I/ML is suitable for 6 applications: Battery-Powered IoT Sensor Nodes, USB HID / CDC Human-Interface Devices, Home Appliance Control Boards, Automotive Body and Interior Modules, Industrial Sensor Conditioning and Edge I/O, LED Lighting and Signage Controllers.
Battery-Powered IoT Sensor Nodes
The PIC18F25K40T-I/ML is well matched to battery-powered IoT sensor nodes because of Microchip's eXtreme Low Power (XLP) technology, which holds sleep current to about 50 nA with the Real-Time Clock/Calendar (RTCC) running. The integrated 10-bit ADC samples sensors directly while the CPU stays in doze, and the EUSART/I2C interfaces talk to radios like LoRa or BLE modules. With 32 KB Flash and 2048 bytes RAM, firmware comfortably fits application logic plus a small RTOS or state machine. The 2.3V-5.5V VDD range also accepts a direct 3.3V coin-cell or 3xAA supply without regulation. Designers save board space because the 28-QFN integrates CIP peripherals (CLC, CWG, WWDT) that offload timing tasks from the CPU.
Recommended
USB HID / CDC Human-Interface Devices
In USB HID or CDC human-interface devices (custom keyboards, control surfaces, instrumentation interfaces), the PIC18F25K40T-I/ML provides enough MIPS at 64 MHz to handle the USB 1.1/2.0 full-speed stack in firmware when paired with an external USB transceiver or via the integrated USB-capable peripheral on the family. The 32 KB Flash absorbs HID report tables plus application logic, while 25 I/O pins scan matrix keyboards, drive LEDs via the CWG PWM, and read encoders. The CIP block CLC helps debounce mechanical switches in hardware, freeing CPU cycles. Industrial temperature grade ('I') supports office, lab and light-industrial enclosures. The 28-QFN footprint keeps the PCB compact enough to fit inside keyboard assemblies and handheld enclosures.
Recommended
Home Appliance Control Boards
Home appliance control boards (washing machines, dishwashers, induction cooktops, smart thermostats) value the PIC18F25K40T-I/ML's mix of 5V-tolerant I/O (handles 5V sensors directly), Core Independent Peripherals, and reliability of the PIC18 architecture with its >40-year field deployment. The CWG and 10-bit PWM channels drive TRIAC/IGBT gate drives for motor and heater control, while the comparators sense zero-cross for AC line timing. With 32 KB Flash, firmware can run a full state machine plus user-interface LCD driving. The 28-QFN with exposed pad provides a low thermal-resistance path when the device is mounted near power stages, and the industrial -40C to +85C temperature grade survives appliance environments.
Recommended
Automotive Body and Interior Modules
Within automotive body and interior modules (door modules, HVAC control panels, RKE receivers, ambient lighting), the PIC18F25K40T-I/ML's XLP sleep current is attractive for always-on nodes that draw <100 uA quiescent. The CWG and PWM peripherals drive LED matrix drivers for ambient lighting, while the 25 I/O pins read button matrices and rotary encoders. Automotive designers typically upgrade to the AEC-Q100-qualified 'Q' or 'K40' family siblings for under-hood deployment, but the industrial-grade part is widely used in cabin modules. The 32 KB Flash absorbs CAN/LIN stack plus application logic. CIPs such as WWDT and CRC/SCAN meet ISO 26262 functional-safety basics for ASIL-classified subsystems.
Recommended
Industrial Sensor Conditioning and Edge I/O
Industrial sensor conditioning and edge I/O modules use the PIC18F25K40T-I/ML for its mix of analog integration and CIPs that handle events in hardware. The 24-channel 10-bit ADC reads multiple 4-20 mA loops and bridge sensors, while the comparators provide windowed overcurrent detection. The CLC allows event-driven logic like PWM-mutex or fault interlocks without CPU load. The 32 KB Flash absorbs Modbus RTU/TCP application code, and the EUSART interfaces directly to RS-485 transceivers. The industrial temperature grade handles factory floor environments, and the 28-QFN gives a small footprint for DIN-rail modules where PCB area is at a premium.
Recommended
LED Lighting and Signage Controllers
In LED lighting drivers and digital signage controllers, the PIC18F25K40T-I/ML's CWG and PWM channels generate precise multi-channel LED drive waveforms with hardware dead-time control, offloading the CPU from real-time timing. With 25 I/O pins, a single MCU can drive several LED strings or DMX512-style addressable LED chains. The 32 KB Flash accommodates lighting effects, color-space conversion and addressable protocols (WS2812, APA102) in bit-banging or DMA mode. XLP sleep current keeps standby-mode power buttons below 0.1 mW, important for ENERGY STAR compliance. The industrial -40C to +85C range covers indoor and outdoor-enclosure operating environments.
Recommended
Recommended Products Summary
Engineering reference data for PIC18F25K40T-I/ML — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC18F25K40-I/ML | PIC18F25K40-E/ML | PIC18F26K40T-I/ML | PIC18F24K40T-I/ML |
|---|---|---|---|---|---|
| Package | 28-QFN (6x6 mm) with EP | 28-QFN (6x6) with EP - same | 28-QFN (6x6) with EP - same | 28-QFN (6x6) with EP - same | 28-QFN (6x6) with EP - same |
| Brand | Microchip Technology | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same | Microchip Technology - same |
| Flash Memory | 32 KB | 32 KB - same | 32 KB - same | 64 KB - upgrade | 16 KB - downgrade |
| RAM | 2048 bytes | 2048 bytes - same | 2048 bytes - same | 4096 bytes - upgrade | 2048 bytes - same |
| Max CPU Clock | 64 MHz | 64 MHz - same | 64 MHz - same | 64 MHz - same | 64 MHz - same |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C - same | -40C to +125C (extended) | -40C to +85C - same | -40C to +85C - same |
| I/O Pins | 25 | 25 - same | 25 - same | 25 - same | 25 - same |
| XLP Sleep Current (typ) | 50 nA (RTCC on) | 50 nA - same | 50 nA - same | 50 nA - same | 50 nA - same |
| Packaging Form | Tape & Reel (T suffix) | Tray (no T) | Tray (no T) | Tape & Reel | Tape & Reel |
Key Differentiators
- Tape-and-reel production packaging with identical silicon to the tray variant (vs PIC18F25K40-I/ML)
- Same 28-QFN footprint, double the Flash for firmware growth (vs PIC18F26K40T-I/ML)
- Industrial temperature grade with XLP sleep around 50 nA (vs PIC18F24K20T-I/ML)
Design Notes
The 28-QFN (6x6 mm) package has a central exposed pad that is electrically the device's primary ground return and thermal path. Solder the exposed pad to a grounded copper pour of at least 25 mm^2 to meet the thermal resistance spec and reduce ground bounce. Estimated: with a 25 mm^2 1 oz copper pour the theta_JA drops from approximately 70 C/W to 40 C/W versus a minimal footprint, providing significant margin at high ambient temperatures.
Decouple each VDD/VSS pair with a 100 nF X7R ceramic placed within 3 mm of the pin. Add a bulk 1 uF-10 uF tantalum or ceramic on the main VDD rail close to the package. For XLP sleep-mode designs, use an MCP1700 or MCP1810 LDO whose quiescent current is below the MCU's sleep current to preserve nanoWatt sleep numbers. The PIC18F25K40T-I/ML accepts 2.3V-5.5V, so a 3.3V or 5V rail can supply it directly.
Keep the ICSP lines PGC (typically RB6) and PGD (typically RB7) accessible by test pads or a 2x3 header so in-circuit programming and debugging work without rework. Avoid routing high-speed switching signals (PWM, CWG outputs) over the analog AVSS/AVDD pins to minimize digital noise coupling into the 10-bit ADC. Route the analog reference VREF+ separately with its own bypass capacitor if used.
Estimated: configuring HFINTOSC at 64 MHz with the 4x PLL requires the active clock tuning register to be set before switching - if firmware skips this step the device runs at 16 MHz and slows all timing-dependent peripherals. Also, the CWG, CLC and PWM peripherals must be unlocked via their respective PMDx/CLCxCON registers before configuration writes take effect. Skipping the unlock sequence is the most common bring-up mistake on the K40 family.
Compliance Information
RoHS and lead-free per Microchip product page. Not AEC-Q100 qualified in the base 'I' (industrial) variant; for AEC-Q100 automotive-grade PIC18F25K40, refer to the automotive 'Q' or specific Microchip automotive datasheet supplements. Halogen-free per Microchip environmental compliance documentation.
