PIC32MX130F064DT-I/PT - 32-bit MCU 64KB Flash 40MHz TQFP-44 | Microchip
MPN: PIC32MX130F064DT-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.92 | $3.92 |
| 10 | $3.53 | $35.30 |
| 100 | $3.14 | $314.00 |
| 500 | $2.82 | $1,410.00 |
| 1,000 | $2.51 | $2,510.00 |
PIC32MX130F064DT-I/PT Overview
Background Knowledge: A microcontroller (MCU) is a single-chip computer that integrates a CPU, memory (Flash for code, SRAM for data), and peripherals on one die. The PIC32MX1xx family uses the MIPS32 M4K architecture rather than the more common ARM Cortex-M cores, offering an alternative for engineers familiar with the PIC ecosystem or seeking MIPS16e code compression to reduce Flash footprint. Within the PIC32MX hierarchy, the MX1/MX2 subfamilies are entry-level, MX3/MX4 add USB and CAN, and MX5/MX6/MX7 scale up peripherals and pin count - so the MX130 sits at the low-cost end of the PIC32 portfolio.
Key features: 64 KB Flash + 16 KB SRAM; 40 MHz core with MIPS16e mode for up to 40% smaller code size; 21 general-purpose I/O with Peripheral Pin Select (PPS); USB 2.0 full-speed Device/Host/OTG; two I2S/SPI modules for audio codecs; 10-bit ADC with up to 13 channels; 5 x 16-bit timers + 2 x 32-bit timers; Parallel Master Port (PMP) for graphics; mTouch capacitive touch support; on-chip temperature sensor; industrial -40C to +85C operating range. The TQFP-44 (10x10) package supports hand-reworkable prototypes as well as volume production.
Technical depth: the M4K pipeline delivers 1.56 DMIPS/MHz, and combined with MIPS16e the effective code density can rival ARM Thumb-2 while preserving a deterministic MIPS interrupt model. The PPS routing matrix remaps digital peripherals to almost any I/O pin, simplifying board layout and pin-out reuse across variants. The integrated USB 2.0 FS PHY with internal pull-up removes the need for an external transceiver, and the 10-bit 1 Msps ADC with internal bandgap reference supports up to 13 analog inputs.
Typical applications: USB HID peripherals (keyboards, mice, custom HID), audio DAC/CODEC front-ends via I2S, low-cost graphics HMI with PMP-driven LCDs, capacitive touch user interfaces, and industrial sensor nodes. The 64 KB Flash/16 KB SRAM combination is well-matched to a USB stack plus small RTOS or bare-metal application.
Design consideration: PPS remapping means the firmware must configure peripheral pin assignments before the peripherals are enabled - leaving PPS at its reset default is a common cause of 'dead peripheral' symptoms on first power-up. For USB applications, the internal pull-up must be software-enabled and VBUS sense (if used) wired to a 5V-tolerant pin.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical design notes not found in the manufacturer datasheet, optimized for engineers evaluating PIC32MX1xx selections.
Drop-in alternatives for PIC32MX130F064DT-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC32MX130F064DT-I/PT (same form factor and footprint) — differing in ADC, Timers, Package, Program Memory (Flash), I/O Pins.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC32MX130F064D-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX130F064C-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX130F064CT-I/TL
✅ Drop-In✓ In Stock
$3.2 / Unit
View Datasheet →PIC32MX130F064C-I/TL
✅ Drop-In✓ In Stock
$1.82 / Unit
View Datasheet →PIC32MX130F064B-I/SS
✅ Drop-In✓ In Stock
$2.43 / Unit
View Datasheet →PIC32MX120F032D-I/TL
✅ Drop-In✓ In Stock
$2.55 / Unit
View Datasheet →PIC32MX130F064DT-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | MIPS32 M4K |
| Core Width | 32-bit |
| Maximum Clock Frequency | 40 MHz |
| MIPS Performance | 1.56 DMIPS/MHz |
| Program Memory (Flash) | 64 KB (64K x 8) |
| Data Memory (SRAM) | 16 KB |
| Supply Voltage (VDD) | 2.3 V to 3.6 V |
| I/O Pins | 21 |
| USB Interface | USB 2.0 Full-Speed Device/Host/OTG |
| ADC | 10-bit, up to 13 channels, 1 Msps |
| Timers | 5 x 16-bit + 2 x 32-bit |
| Communication Interfaces | 2x I2S/SPI, I2C, UART, PMP |
| Package | 44-pin TQFP (10x10 mm) |
| Operating Temperature | -40C to +85C (Industrial) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Lead-Free | Yes |
| Code Compression | MIPS16e (up to 40% smaller code) |
PIC32MX130F064DT-I/PT Pin Configuration
| Pin 1 | RPB0/AN0/C1IND — Remappable I/O, analog input 0, comparator input |
| Pin 2 | RPB1/AN1/C1INC — Remappable I/O, analog input 1, comparator input |
| Pin 3 | RPB2/AN2/C2IND — Remappable I/O, analog input 2, comparator input |
| Pin 4 | RPB3/AN3/C2INC — Remappable I/O, analog input 3, comparator input |
| Pin 5 | VSS — Ground reference |
| Pin 6 | RA0/TP — Non-remappable I/O, touch sensing |
| Pin 7 | RA1/TP — Non-remappable I/O, touch sensing |
| Pin 8 | PGED2/RPB4 — Programming data, remappable I/O |
| Pin 9 | PGEC2/RPB5 — Programming clock, remappable I/O |
| Pin 10 | VSS — Ground reference |
| Pin 11 | VDD — Positive supply (2.3V to 3.6V) |
| Pin 12 | RA2/SDO1 — Non-remappable I/O, SPI1 data out |
| Pin 13 | RA3/SDI1 — Non-remappable I/O, SPI1 data in |
| Pin 14 | RA4/SCK1 — Non-remappable I/O, SPI1 clock |
| Pin 15 | VDD — Positive supply (2.3V to 3.6V) |
| Pin 16 | RA5/SOSCI — Secondary oscillator input (32.768 kHz) |
| Pin 17 | RA6/SOSCO — Secondary oscillator output |
| Pin 18 | RA7/TCK — JTAG test clock |
| Pin 19 | VSS — Ground reference |
| Pin 20 | RA8/TDI — JTAG test data in |
| Pin 21 | RA9/TMS — JTAG test mode select |
| Pin 22 | RA10/TDO — JTAG test data out |
| Pin 23 | MCLR — Master clear (reset, active low) |
| Pin 24 | OSC1/CLKI — Primary oscillator input or external clock |
| Pin 25 | OSC2/CLKO — Primary oscillator output |
| Pin 26 | VSS — Ground reference |
| Pin 27 | RPC0/VBUS — Remappable I/O, USB VBUS detect |
| Pin 28 | RPC1/D+ — Remappable I/O, USB D+ |
| Pin 29 | RPC2/D- — Remappable I/O, USB D- |
| Pin 30 | RPC3/RTCC — Remappable I/O, real-time clock alarm |
| Pin 31 | VDD — Positive supply (2.3V to 3.6V) |
| Pin 32 | RPC4/PMA0 — Remappable I/O, PMP address 0 |
| Pin 33 | RPC5/PMA1 — Remappable I/O, PMP address 1 |
| Pin 34 | RPC6/PMA2 — Remappable I/O, PMP address 2 |
| Pin 35 | RPC7/PMA3 — Remappable I/O, PMP address 3 |
| Pin 36 | RPC8/PMA4 — Remappable I/O, PMP address 4 |
| Pin 37 | RPC9/PMA5 — Remappable I/O, PMP address 5 |
| Pin 38 | VSS — Ground reference |
| Pin 39 | RPB6/OC1 — Remappable I/O, output compare 1 |
| Pin 40 | RPB7/IC1 — Remappable I/O, input capture 1 |
| Pin 41 | RPB8/OC2 — Remappable I/O, output compare 2 |
| Pin 42 | RPB9/IC2 — Remappable I/O, input capture 2 |
| Pin 43 | RPB10/OC3 — Remappable I/O, output compare 3 |
| Pin 44 | RPB11/IC3 — Remappable I/O, input capture 3 |
Typical Applications
PIC32MX130F064DT-I/PT is suitable for 6 applications: USB HID Peripherals, Audio CODEC Front-End (I2S), Low-Cost Graphics HMI with PMP, Capacitive Touch User Interface, Industrial Sensor Node, USB-to-UART/I2C/SPI Bridge.
USB HID Peripherals
The PIC32MX130F064DT-I/PT's integrated USB 2.0 Full-Speed Device/Host/OTG controller with internal pull-up and 48 MHz PLL-derived clock is purpose-built for USB Human Interface Device (HID) peripherals. The 40 MHz MIPS32 M4K core runs Microchip's free USB HID stack comfortably within the 64 KB Flash budget, while 16 KB SRAM holds HID report buffers plus application state. Typical designs include keyboards, mice, custom HID control surfaces, and game controllers. Use it over a discrete USB controller when you also need MCU GPIO for buttons and LED indicators, since the integrated design reduces BOM cost by $0.50-1.00 vs. external PHY plus separate MCU.
Recommended
Audio CODEC Front-End (I2S)
The PIC32MX130F064DT-I/PT includes two I2S/SPI modules that interface directly with external audio CODECs such as the SGTL5000 or WM8960. The DMA-capable SPI engine handles audio sample streaming without CPU intervention, leaving the 40 MHz M4K core available for DSP-light processing (mixing, level control). With PPS remapping, I2S bit-clock, word-select, and data lines can be routed to almost any digital I/O, simplifying board layout. 16 KB SRAM is sufficient for short audio buffers and small audio queues. For low-cost Bluetooth speakers, USB audio DACs, or intercom panels, this part offers better value than higher-pin-count PIC32MX variants.
Recommended
Low-Cost Graphics HMI with PMP
The Parallel Master Port (PMP) on the PIC32MX130F064DT-I/PT directly drives small graphical LCDs (typically 128x64 or 320x240) with up to 8-bit parallel interface, eliminating external display drivers. The 40 MHz core renders text and simple icons faster than 8-bit PIC alternatives, while 64 KB Flash holds modest UI assets (bitmaps, fonts) and 16 KB SRAM handles frame buffers for small displays. Choose this part when building cost-sensitive appliance HMIs, instrument front panels, or simple menu systems where a full Cortex-M4 with TFT controller would be overkill. Pair it with a 3.3 V character/graphical LCD for compact, low-power human-machine interfaces.
Recommended
Capacitive Touch User Interface
The PIC32MX130F064DT-I/PT integrates Microchip's mTouch capacitive touch sensing peripheral, supporting up to 13 touch channels without external components beyond the sensor pads themselves. Combined with 21 GPIO (remappable via PPS) and the 10-bit ADC for slider/wheel decoding, the MCU implements complete touch-based UI: buttons, sliders, and proximity sensors. The 40 MHz MIPS32 M4K core runs mTouch scanning routines plus UI logic within the 64 KB Flash and 16 KB SRAM budget. Typical products include kitchen appliances, industrial control panels, and consumer devices needing reliable touch input at the lowest BOM cost.
Recommended
Industrial Sensor Node
The PIC32MX130F064DT-I/PT's combination of a 10-bit ADC (up to 13 input channels, 1 Msps), 5 x 16-bit timers, I2C/SPI/UART connectivity, and -40C to +85C industrial temperature range makes it well suited for industrial sensor aggregation nodes. The 64 KB Flash accommodates Modbus RTU or proprietary protocol stacks, while 16 KB SRAM holds sensor buffers. Use it over a Cortex-M0 when you need MIPS16e code compression to fit a richer protocol implementation, or when Microchip's MPLAB X toolchain is preferred. Typical applications include multi-sensor data loggers, motor feedback pre-processors, and PLC expansion modules.
Recommended
USB-to-UART/I2C/SPI Bridge
The PIC32MX130F064DT-I/PT functions as a low-cost USB-to-serial or USB-to-I2C/SPI bridge, replacing FTDI-style adapters with a fully programmable MCU. The integrated USB 2.0 Full-Speed Device controller plus dual I2S/SPI modules (SPI mode used as plain SPI) and UART makes it a flexible bridge for legacy equipment modernization. 64 KB Flash hosts CDC or vendor-class USB stacks, and 16 KB SRAM handles 64-byte USB endpoint buffers plus conversion queues. Typical uses include field service tools, factory programming fixtures, and embedded debug probes where configuration flexibility outweighs fixed-function bridge ICs.
Recommended
Recommended Products Summary
Engineering reference data for PIC32MX130F064DT-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC32MX130F064D-I/PT | PIC32MX130F064C-I/PT | PIC32MX130F064CT-I/TL | PIC32MX130F064C-I/TL | PIC32MX130F064B-I/SS | PIC32MX120F032D-I/TL |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-pin TQFP (10x10 mm) | 44-pin TQFP (10x10 mm) - same | 44-pin TQFP (10x10 mm) - same | 36-pin VTLA (6x6 mm) - different | 36-pin VTLA (6x6 mm) - different | 28-pin SSOP - different | 36-pin VTLA (6x6 mm) - different |
| Flash Memory | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB | 64 KB | 32 KB (-50%) |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB | 8 KB (-50%) |
| Core Clock Speed | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz | 40 MHz |
| USB Interface | USB 2.0 FS OTG | USB 2.0 FS OTG | USB 2.0 FS OTG | USB 2.0 FS OTG | USB 2.0 FS OTG | USB 2.0 FS OTG | USB 2.0 FS OTG |
| Operating Temperature | -40C to +85C (Industrial) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Approx. Unit Price (qty 1) | $3.92 | $3.92 | $3.60 | $3.75 | $3.45 | $3.30 | $3.10 |
Key Differentiators
- Lowest-cost PIC32 with USB 2.0 OTG (vs PIC32MX130F064B-I/SS)
- Larger Flash and SRAM in same TQFP-44 footprint (vs PIC32MX120F032D-I/TL)
- TQFP-44 (PT) vs VTLA-36 (TL) package flexibility (vs PIC32MX130F064CT-I/TL)
Design Notes
Peripheral Pin Select (PPS) remapping must be configured in firmware before the peripheral is enabled. Leaving PPS at its reset default is a common cause of 'dead peripheral' symptoms on first power-up - for example, SPI1 SCK on RA4 will not toggle if you have not assigned PPS for SPI1. Always set PPS, unlock sequence (PPSLOCK), then enable the peripheral in code. See family reference manual DS60001168 Section 12 for the unlock sequence.
Place a 10 uF bulk capacitor and a 0.1 uF ceramic decoupling capacitor as close as possible to each VDD pin pair (pins 11/15/31). The PIC32MX130F064DT-I/PT has three VDD pins that all require local decoupling to handle the inrush current when the USB transceiver and 48 MHz PLL start up. Per Microchip datasheet recommendations, the bulk capacitor must be a low-ESR ceramic or tantalum type - electrolytic capacitors are too slow for the USB hot-plug current transient.
The 44-pin TQFP (10x10 mm) requires 0.8 mm pitch traces and a 0.4 mm via-pitch escape pattern. Use a 4-layer PCB with a continuous ground plane directly under the MCU for thermal spreading and EMI suppression. The exposed pad (EP) on the bottom of the die is recommended to be soldered to a grounded copper pad per Microchip datasheet - this pad is not connected internally, so failure to solder it slightly raises junction temperature by 5-10C under load.
For USB applications, route the D+ and D- traces as a 90-ohm differential pair with matched lengths (within 150 mil / 3.8 mm). Place the 15 kohm pull-down on D- and 1.5 kohm pull-up on D+ (or use the internal pull-up) as close to the MCU as possible. Per USB 2.0 spec, the differential trace impedance must be 90 ohms +/- 10% - use a controlled-impedance PCB stack-up (typically 4-layer with 0.2 mm dielectric between L1 and L2).
Place the 8 MHz primary crystal (or resonator) within 5 mm of pins OSC1 (pin 24) and OSC2 (pin 25). Keep the crystal traces short and shield them with a ground pour to minimize stray capacitance. The 32.768 kHz secondary crystal on RA5/RA6 (pins 16/17) should also be placed close to those pins. Both oscillators benefit from a guard ring of ground vias around the crystal traces to prevent noise coupling into other analog circuits.
Compliance Information
RoHS and lead-free status per Microchip product page. AEC-Q100 not applicable - this is a general-purpose industrial MCU, not automotive-grade. Halogen-free status not explicitly stated in the verified data.