PIC32MX130F256D-I/PT - 32-bit MCU 256KB Flash 40MHz | Microchip
MPN: PIC32MX130F256D-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.45 | $6.45 |
| 10 | $5.78 | $57.80 |
| 100 | $4.95 | $495.00 |
| 500 | $4.18 | $2,090.00 |
| 1,000 | $3.72 | $3,720.00 |
| 3,000 | $3.3 | $9,900.00 |
PIC32MX130F256D-I/PT Overview
What is a PIC32MX microcontroller? The PIC32MX1xx/2xx family is Microchip's mid-range 32-bit MCU line built on the MIPS32 M4K architecture, designed as a natural migration path from 8-bit PIC16/PIC18 and 16-bit PIC24/dsPIC devices. It belongs to the broader microcontroller taxonomy: microcontroller -> embedded MCU -> 32-bit RISC MCU -> MIPS architecture -> power management class. PIC32MX devices are commonly used when engineers need more code space, larger RAM buffers, or higher computational headroom than 8/16-bit MCUs can deliver, but without the cost or complexity of ARM Cortex-M parts.
Key features include a 1.0 MSPS 10-bit ADC with up to 13 analog inputs, a 5-bit DAC, four 16-bit timers/counters, two I2C and two UART interfaces, and hardware mTouch capacitive-touch support with 1 ns Charge Time Measurement Unit (CTMU) resolution. The device also offers an on-chip temperature sensor and JTAG/ICSP debug. The 44-TQFP package exposes enough pins to drive small color TFTs through the PMP while still leaving room for digital I/O expansion.
The architecture pairs a 5-stage pipeline MIPS32 core with a single-cycle 32x32 hardware multiplier, enabling efficient DSP-style routines such as FIR filters and PID loops. The 256 KB Flash supports self-programming and a 3 KB instruction cache reduces Flash wait states at 40 MHz, sustaining 1.56 DMIPS/MHz. A peripheral bus DMA engine offloads data movement between the ADC, UART, and PMP, freeing the CPU for application logic.
Typical applications include industrial control interfaces, low-cost graphical HMI panels via PMP-driven TFTs, sensor hubs, motor-control commutation loops, and consumer devices requiring USB-free connectivity. It is also used as a CIP (communication/IO co-processor) bridging sensors to higher-tier ARM-based SoCs. When designing with this device, take care to use Microchip's MPLAB XC32 compiler and follow the recommended decoupling-network layout (one 0.1 uF + one 10 uF per VDD/AVDD pair) to keep ADC readings within stated INL/DNL across the full -40C to +85C range.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, helping procurement and firmware engineers compare the PIC32MX130F256D-I/PT against same-package PIC32MX1xx/2xx variants and third-party 44-TQFP 32-bit MCUs on real specifications rather than marketing claims.
Drop-in alternatives for PIC32MX130F256D-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC32MX130F256D-I/PT (same form factor and footprint) — differing in ADC, Package, Operating Temperature, Timers, Program Memory (Flash).
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC32MX130F256D-50I/PT
✅ Drop-In✓ In Stock
$3.42 / Unit
View Datasheet →PIC32MX250F256D-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX150F256D-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC32MX230F256D-I/PT
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX130F256D-I/ML
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX130F064D-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
PIC32MX130F256D-I/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | MIPS32 M4K 32-bit RISC |
| Maximum CPU Speed | 50 MHz (40 MHz at -40C to +85C industrial grade) |
| Performance | 83 DMIPS |
| Program Memory (Flash) | 256 KB (256K x 8) |
| SRAM | 16 KB |
| Operating Voltage (VDD) | 2.3 V to 3.6 V |
| Typical Active Current | 0.5 mA/MHz |
| ADC | 10-bit, up to 1 MSPS, up to 13 channels |
| DAC | 5-bit on-chip DAC |
| I2S/SPI Modules | 2 |
| I2C Modules | 2 |
| UART Modules | 2 |
| Parallel Master Port (PMP) | Yes |
| Peripheral Pin Select (PPS) | Yes |
| Timers | 5 x 16-bit (Timer1-Timer5) |
| CTMU / mTouch | 1 ns time-measurement resolution, supports capacitive touch |
| On-chip Temperature Sensor | Yes |
| Debug Interface | ICSP/ICD plus JTAG boundary scan |
| Operating Temperature | -40C to +85C (industrial, -I) |
| Package | 44-pin TQFP (PT), 10x10 mm |
| Mounting Type | Surface Mount |
| MSL Level | 3 (168 hours) |
| RoHS Status | Compliant |
| Lead-Free / Halogen-Free | Yes / Yes |
PIC32MX130F256D-I/PT Pin Configuration
| Pin 1 | RPB0/AN0/C1IND/RTCC — PPS remappable I/O, ADC input 0, comparator input, RTCC output |
| Pin 2 | RPB1/AN1/C1INC/RTCC — PPS remappable I/O, ADC input 1, comparator input |
| Pin 3 | RPB2/AN2/C2IND/C3IND — PPS remappable I/O, ADC input 2, comparator inputs |
| Pin 4 | RPB3/AN3/C2INC/C3INC — PPS remappable I/O, ADC input 3, comparator inputs |
| Pin 5 | VSS — Ground reference |
| Pin 6 | RPC0/PMA16 — PPS remappable I/O, Parallel Master Port address line 16 |
| Pin 7 | RPC1/PMA17 — PPS remappable I/O, Parallel Master Port address line 17 |
| Pin 8 | VSS — Ground reference |
| Pin 9 | RPC2/PMA18 — PPS remappable I/O, PMP address line 18 |
| Pin 10 | RPC3/PMA19 — PPS remappable I/O, PMP address line 19 |
| Pin 11 | VDD — Positive supply voltage (2.3 V to 3.6 V) |
| Pin 12 | RPC4/PMA20 — PPS remappable I/O, PMP address line 20 |
| Pin 13 | RPC5/PMA21 — PPS remappable I/O, PMP address line 21 |
| Pin 14 | RPC6/PMA22 — PPS remappable I/O, PMP address line 22 |
| Pin 15 | RPC7/PMA23 — PPS remappable I/O, PMP address line 23 |
| Pin 16 | VSS — Ground reference |
| Pin 17 | VDD — Positive supply voltage |
| Pin 18 | RPD0/PMD0/OC1 — PPS I/O, PMP data 0, Output Compare 1 |
| Pin 19 | RPD1/PMD1/OC2 — PPS I/O, PMP data 1, Output Compare 2 |
| Pin 20 | RPD2/PMD2/OC3 — PPS I/O, PMP data 2, Output Compare 3 |
| Pin 21 | RPD3/PMD3/OC4 — PPS I/O, PMP data 3, Output Compare 4 |
| Pin 22 | RPD4/PMD4 — PPS I/O, PMP data 4 |
| Pin 23 | RPD5/PMRD/PMWR — PPS I/O, PMP read/write strobe |
| Pin 24 | RPD6/PMD6 — PPS I/O, PMP data 6 |
| Pin 25 | RPD7/PMD7 — PPS I/O, PMP data 7 |
| Pin 26 | VSS — Ground reference |
| Pin 27 | AVSS — Analog ground |
| Pin 28 | AVDD — Analog positive supply (2.3 V to 3.6 V) |
| Pin 29 | RPD8/PMD8 — PPS I/O, PMP data 8 |
| Pin 30 | RPD9/PMD9 — PPS I/O, PMP data 9 |
| Pin 31 | RPD10/PMD10 — PPS I/O, PMP data 10 |
| Pin 32 | RPD11/PMD11 — PPS I/O, PMP data 11 |
| Pin 33 | RPD12/PMD12 — PPS I/O, PMP data 12 |
| Pin 34 | RPD13/PMD13 — PPS I/O, PMP data 13 |
| Pin 35 | RPD14/PMD14 — PPS I/O, PMP data 14 |
| Pin 36 | RPD15/PMD15 — PPS I/O, PMP data 15 |
| Pin 37 | VCAP — Internal voltage-regulator bypass capacitor (4.7 uF to VSS) |
| Pin 38 | PGEC1/AN7 — ICSP clock 1 / ADC input 7 |
| Pin 39 | PGED1/AN6 — ICSP data 1 / ADC input 6 |
| Pin 40 | VSS — Ground reference |
| Pin 41 | VDD — Positive supply voltage |
| Pin 42 | PGEC2/AN8 — ICSP clock 2 / ADC input 8 |
| Pin 43 | PGED2/AN9 — ICSP data 2 / ADC input 9 |
| Pin 44 | OSCI/CLKI/RC12 — Oscillator crystal input or external clock input |
Typical Applications
PIC32MX130F256D-I/PT is suitable for 6 applications: Industrial HMI with PMP-driven TFT Display, mTouch Capacitive Touch Control Panel, Sensor Hub / Data Acquisition Front-End, Motor Control Commutation Loop, Consumer Audio Decoder with I2S Codec, Medical Monitoring Accessory.
Industrial HMI with PMP-driven TFT Display
The PIC32MX130F256D-I/PT is a natural fit for industrial human-machine interfaces that use a small 3.5 to 5 inch color TFT driven by the on-chip Parallel Master Port (PMP). The PMP supports 8-bit multiplexed addressing so a single MCU can refresh QVGA/WQVGA panels without external controllers, while the 16 KB SRAM buffers frame updates and the 83 DMIPS MIPS32 M4K core renders fonts and widgets in real time. The 0.5 mA/MHz active current keeps total system power around 25 mA at 40 MHz, and the 10-bit ADC reads backlight temperature for ambient-light compensation. Compared with discrete display controllers, this single-chip solution reduces BOM cost while still meeting industrial -40C to +85C requirements for control-panel deployment.
Recommended
mTouch Capacitive Touch Control Panel
The PIC32MX130F256D-I/PT's integrated CTMU (Charge Time Measurement Unit) provides 1 ns time-measurement resolution, which Microchip's mTouch firmware library uses to scan 10 to 30 capacitive buttons or a slider with sub-mm resolution. The 256 KB Flash is enough to host the mTouch library alongside application code, while the 16 KB RAM buffers debounce and gesture state without CPU intervention. The 0.5 mA/MHz active current and dedicated peripheral keep touch responsiveness below 25 ms even while the main CPU runs HMI rendering. Compared with mechanical buttons, this CTMU-based solution improves ingress protection to IP65 and eliminates mechanical wear, both critical for white-goods and industrial-control panels.
Recommended
Sensor Hub / Data Acquisition Front-End
The PIC32MX130F256D-I/PT excels as a sensor hub that aggregates analog and digital sensors before forwarding data over UART or SPI to a higher-tier processor. The 10-bit 1 MSPS ADC with up to 13 channels samples multi-axis accelerometers, temperature probes, and analog pressure sensors, while the two I2C and two UART modules handle serial sensors concurrently. With 256 KB Flash and 16 KB SRAM, it can run calibration tables, averaging filters, and a small TCP/IP stack over a UART-attached Wi-Fi module. The -40C to +85C industrial rating and Peripheral Pin Select flexibility let the same PCB host different sensor combinations by remapping functions in firmware, simplifying SKU proliferation.
Recommended
Motor Control Commutation Loop
For low-voltage BLDC or stepper control, the PIC32MX130F256D-I/PT delivers deterministic 25 ns interrupt latency from its 5-stage MIPS32 pipeline, enabling 20 kHz PWM commutation loops. The five 16-bit timers can each drive a complementary PWM pair with dead-band insertion, and the 10-bit ADC reads back EMF or current-sense signals synchronously with the PWM center. The 256 KB Flash hosts sensorless back-EMF or Field-Oriented Control (FOC) reference code from Microchip's AN1078 application note, and the 16 KB RAM is sufficient for Park/Clarke transform buffers. Compared with 8-bit PIC16 alternatives, the 32-bit core reduces loop latency by 5x and supports more advanced commutation strategies without external DSP.
Recommended
Consumer Audio Decoder with I2S Codec
The PIC32MX130F256D-I/PT's two I2S/SPITM modules can each interface with a 24-bit stereo audio codec, making it suitable for network-audio endpoints, Bluetooth-sink accessories, or simple alarm-tone generators. The 83 DMIPS core runs lossless audio decoding (FLAC, ALAC) at modest sample rates without breaking a sweat, while the 16 KB SRAM buffers a 16 ms audio slice at 48 kHz / 16-bit. PPS reassigns peripheral pins so the same board layout supports either I2S or PCM codecs, simplifying SKU reuse across product lines. The industrial temperature grade and on-chip temperature sensor add reliability for in-wall or outdoor audio products.
Recommended
Medical Monitoring Accessory
The PIC32MX130F256D-I/PT supports low-power medical peripherals such as pulse-oximeter front-ends, temperature patches, and connected inhaler sensors that demand predictable real-time behavior. Its 10-bit ADC samples photodiode or thermistor waveforms at 1 MSPS, while the CTMU measures time-of-flight for ultrasonic spirometry. The 256 KB Flash is sufficient for IEC 62304-class B firmware with self-test routines, and the 16 KB SRAM holds trend buffers. Although the part itself is not FDA-cleared, its deterministic MIPS32 pipeline and on-chip temperature sensor let accessory OEMs add pre-processing that reduces load on the host phone or gateway over BLE.
Recommended
Recommended Products Summary
Engineering reference data for PIC32MX130F256D-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC32MX130F256D-50I/PT | PIC32MX250F256D-I/PT | PIC32MX150F256D-I/PT | PIC32MX230F256D-I/PT |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 44-TQFP (PT) 10x10 mm | 44-TQFP (PT) 10x10 mm - same | 44-TQFP (PT) 10x10 mm - same | 44-TQFP (PT) 10x10 mm - same | 44-TQFP (PT) 10x10 mm - same |
| Core | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit | MIPS32 M4K 32-bit |
| Max CPU Speed (industrial) | 40 MHz | 50 MHz | 50 MHz | 50 MHz | 50 MHz |
| Flash | 256 KB | 256 KB | 256 KB | 256 KB | 256 KB |
| SRAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| USB 2.0 FS | No | No | Yes | No | Yes |
| PMP | 1 port | 1 port | 2 ports | 1 port | 2 ports |
| Operating Temperature | -40C to +85C (I) | -40C to +85C (I) | -40C to +85C (I) | -40C to +85C (I) | -40C to +85C (I) |
| Approx. 1k price (USD, 2026-10-01) | 3.72 | 3.95 | 4.20 | 3.85 | 4.10 |
Key Differentiators
- Highest 83 DMIPS throughput at 0.5 mA/MHz in the 44-TQFP PIC32MX1xx family (vs PIC24HJ64GP504-I/PT)
- On-chip 1 MSPS 10-bit ADC plus CTMU in one device (vs PIC32MM0256GPM048-I/PT)
- Drop-in 50 MHz upgrade path in the same 44-TQFP footprint (vs PIC32MX130F256D-50I/PT)
Design Notes
Place one 0.1 uF X7R ceramic decoupling capacitor adjacent to every VDD and AVDD pin pair (1, 11, 17, 28, 41 on the 44-TQFP), plus a single 10 uF bulk tantalum or ceramic at the package's power entry. The PIC32MX130F256D-I/PT draws short bursts up to 70 mA during Flash programming; insufficient decoupling will cause ADC reference drift and spurious resets. For ADC accuracy better than 1 LSB, route AVDD through a ferrite bead and place a dedicated 10 uF + 0.1 uF pair within 5 mm of pin 28.
Estimated: At 40 MHz with all peripherals active, the PIC32MX130F256D-I/PT dissipates approximately 20 mA x 3.3 V = 66 mW, yielding a junction temperature rise of roughly 1.5 C above ambient with the 44-TQFP's theta_JA of approximately 45 C/W (4-layer JEDEC test board). For designs running at the industrial 85 C ceiling, no heatsink or thermal relief copper is required. If the application disables peripherals aggressively, average dissipation falls below 30 mW and battery-friendly duty cycles become practical.
The 44-TQFP (10x10 mm) pin pitch is 0.8 mm, requiring 0.4 mm-wide traces and 0.2 mm spaces between pads - well within standard 4-layer stack-up capabilities. Keep the VCAP pin (37) trace to its 4.7 uF bypass capacitor under 6 mm with a wide ground return; long VCAP traces cause core-voltage droop that triggers brown-out resets at high dI/dt loads such as PMP write bursts. Route the 32 kHz secondary crystal traces (if used) symmetrically and guard them with a ground ring to avoid coupling into adjacent ADC channels.
Three pitfalls are common on first-time PIC32MX1XX designs: (1) forgetting to configure the DEVCFG0/DEVCFG1 fuses to enable the secondary oscillator before connecting a 32.768 kHz crystal, which causes RTCC drift of several seconds per day; (2) leaving JTAG enabled in production firmware, which exposes debug access and consumes ~2 mA additional current; (3) enabling PPS without first unlocking the IOLOCK bit, which silently disables peripheral output and is one of the top support topics in the Microchip PIC32MX forum. Read Microchip application note AN1388 and errata DS80000539H before going to prototype.
Compliance Information
RoHS and REACH compliance per Microchip product environmental compliance documentation. The -I/PT variant is industrial grade (-40C to +85C) and is not AEC-Q100 qualified; automotive designs should migrate to AEC-Q100-qualified PIC32 variants. Lead-free and halogen-free per Microchip material declaration DS22429.