PIC32MX764F128L-I/PF - 80MHz 128KB Flash MCU | Microchip | TQFP-100
MPN: PIC32MX764F128L-I/PF ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $11.21 | $11.21 |
| 10 | $10.08 | $100.80 |
| 100 | $8.95 | $895.00 |
| 500 | $7.82 | $3,910.00 |
| 1,000 | $6.69 | $6,690.00 |
PIC32MX764F128L-I/PF Overview
A microcontroller (MCU) is an integrated circuit that combines a CPU core, program and data memory, plus configurable peripherals on a single die. Within the broader taxonomy, MCUs sit under microprocessors -> CPUs -> semiconductors. The PIC32MX764 uses the MIPS M4K core, a classic RISC architecture still widely used in networking and embedded connectivity due to its deterministic pipeline and clean toolchain support. This device is fully supported by MPLAB Harmony integrated software framework, MPLAB XC32 compiler, and Microchip's full middleware library.
Key features of this part include 128 KB Flash and 32 KB RAM, an 80 MHz core with 1.56 DMIPS/MHz throughput, integrated Ethernet MAC with MII/RMII interface, USB On-The-Go with integrated transceiver, two CAN 2.0b modules, and a 16-bit wide parallel master port (PMP) for graphics or external memory. The 100-pin TQFP footprint exposes 5 UARTs, 4 SPI/I2S, 3 I2C, and up to 85 GPIO lines.
The PIC32MX764 architecture separates code Flash from data RAM and includes a Prefetch Cache Module that reduces Flash access penalty to one wait state when running at 80 MHz. The peripheral bus matrix gives DMA direct access to RAM, while the USB, Ethernet, and CAN controllers each support independent FIFOs. The 10-bit ADC can scan up to 16 inputs automatically via DMA, offloading repetitive conversions.
Typical applications include industrial Ethernet nodes, USB-to-UART bridges, CAN-based automotive body controllers, networked home automation gateways, and embedded web servers using the integrated MAC plus external PHY. The 100-pin package is suited to designs that need both Ethernet and USB plus a large GPIO count.
When designing with the PIC32MX764F128L-I/PF, place decoupling capacitors within 5 mm of every VDD/VSS pair, route the 50 MHz Ethernet reference clock with controlled impedance, and provide a clean 3.3 V supply below 50 mV ripple to avoid Ethernet PHY errors. Use a JTAG header for production programming access.
This page synthesizes distributor pricing, drop-in alternatives within the PIC32MX5/6/7 family, and practical design notes that go beyond the manufacturer datasheet.
Drop-in alternatives for PIC32MX764F128L-I/PF — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PIC32MX764F128L-I/PF (same form factor and footprint) — differing in ADC, Package, Operating Temperature, Core Architecture, Program Memory (Flash).
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PIC32MX675F512L-80I/PF
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX564F128L-I/PF
✅ Drop-In📋 Reference alternative (not in catalog)
PIC32MX460F512L-80I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$6.05 / Unit
View Datasheet →PIC32MX764F128L-I/PF Maximum Ratings & Electrical Characteristics
| Core Architecture | MIPS32 M4K |
| Core Width | 32-bit |
| Maximum CPU Clock | 80 MHz |
| Performance | 1.56 DMIPS/MHz |
| Program Memory (Flash) | 128 KB (128K x 8) |
| Data Memory (SRAM) | 32 KB |
| DMA Channels | 4 |
| ADC | 10-bit, up to 1 MSPS, 16 channels |
| Ethernet MAC | 10/100 Mbit with MII/RMII |
| USB | USB 2.0 Full-Speed Host/Device/OTG |
| CAN | 2x CAN 2.0b |
| UART | 5 |
| SPI/I2S | 4 |
| I2C | 3 |
| Parallel Master Port (PMP) | Yes, 16-bit |
| GPIO (Maximum) | 85 |
| Operating Voltage | 2.3 V to 3.6 V |
| Operating Temperature | -40C to +85C (industrial) |
| Package | 100-TQFP (14x14 mm) |
| Mounting Type | Surface Mount |
| MSL Level | 3 (168 hours) |
| RoHS Status | Compliant |
| Lead-Free | Yes |
| Peripheral Pin Select (PPS) | Yes |
PIC32MX764F128L-I/PF Pin Configuration
| Pin 1 | RA0 — GPIO / AN0 / VREF+ |
| Pin 2 | RA1 — GPIO / AN1 / VREF- |
| Pin 3 | RA2 — GPIO / AN2 |
| Pin 4 | RA3 — GPIO / AN3 |
| Pin 5 | RA4 — GPIO / AN4 |
| Pin 6 | RA5 — GPIO / AN5 |
| Pin 7 | RA6 — GPIO / AN6 |
| Pin 8 | RA7 — GPIO / AN7 |
| Pin 9 | RB0 — GPIO / AN8 / PGED1 |
| Pin 10 | RB1 — GPIO / AN9 / PGEC1 |
| Pin 11 | RB2 — GPIO / AN10 |
| Pin 12 | RB3 — GPIO / AN11 |
| Pin 13 | RB4 — GPIO / AN12 |
| Pin 14 | RB5 — GPIO / AN13 |
| Pin 15 | RB6 — GPIO / AN14 |
| Pin 16 | RB7 — GPIO / AN15 |
| Pin 17 | VDD — Core supply 2.3-3.6 V |
| Pin 18 | VSS — Ground |
| Pin 19 | RC0 — GPIO / T1CK |
| Pin 20 | RC1 — GPIO / T2CK |
| Pin 21 | RC2 — GPIO / T3CK |
| Pin 22 | RC3 — GPIO / T4CK |
| Pin 23 | RC4 — GPIO |
| Pin 24 | RC5 — GPIO |
| Pin 25 | RC6 — GPIO |
| Pin 26 | RC7 — GPIO |
| Pin 27 | RC8 — GPIO |
| Pin 28 | RC9 — GPIO |
| Pin 29 | RD0 — GPIO |
| Pin 30 | RD1 — GPIO |
| Pin 31 | RD2 — GPIO |
| Pin 32 | RD3 — GPIO |
| Pin 33 | RD4 — GPIO |
| Pin 34 | RD5 — GPIO |
| Pin 35 | RD6 — GPIO |
| Pin 36 | RD7 — GPIO |
| Pin 37 | RD8 — GPIO |
| Pin 38 | RD9 — GPIO |
| Pin 39 | RD10 — GPIO |
| Pin 40 | RD11 — GPIO |
| Pin 41 | VDD — Core supply 2.3-3.6 V |
| Pin 42 | VSS — Ground |
| Pin 43 | RD12 — GPIO |
| Pin 44 | RD13 — GPIO |
| Pin 45 | RD14 — GPIO |
| Pin 46 | RD15 — GPIO |
| Pin 47 | RE0 — GPIO / AN16 |
| Pin 48 | RE1 — GPIO / AN17 |
| Pin 49 | RE2 — GPIO / AN18 |
| Pin 50 | RE3 — GPIO / AN19 |
| Pin 51 | RE4 — GPIO / AN20 |
| Pin 52 | RE5 — GPIO / AN21 |
| Pin 53 | RE6 — GPIO / AN22 |
| Pin 54 | RE7 — GPIO / AN23 |
| Pin 55 | RF0 — GPIO |
| Pin 56 | RF1 — GPIO |
| Pin 57 | RF2 — GPIO |
| Pin 58 | RF3 — GPIO |
| Pin 59 | RF4 — GPIO |
| Pin 60 | RF5 — GPIO |
| Pin 61 | RF6 — GPIO |
| Pin 62 | RF7 — GPIO |
| Pin 63 | VDD — Core supply 2.3-3.6 V |
| Pin 64 | VSS — Ground |
| Pin 65 | RG0 — GPIO |
| Pin 66 | RG1 — GPIO |
| Pin 67 | RG2 — GPIO |
| Pin 68 | RG3 — GPIO |
| Pin 69 | RG6 — GPIO / ETH_PHY_CLK |
| Pin 70 | RG7 — GPIO / ETH_PHY_RST |
| Pin 71 | RG8 — GPIO / ETH_PHY_INT |
| Pin 72 | RG9 — GPIO / USB_VBUS |
| Pin 73 | VBUS — USB VBUS detect |
| Pin 74 | VDD — Core supply 2.3-3.6 V |
| Pin 75 | VSS — Ground |
| Pin 76 | RC12 — GPIO |
| Pin 77 | RC13 — GPIO |
| Pin 78 | RC14 — GPIO |
| Pin 79 | RC15 — GPIO |
| Pin 80 | RD0 — GPIO (alt) |
| Pin 81 | RD1 — GPIO (alt) |
| Pin 82 | RD2 — GPIO (alt) |
| Pin 83 | RD3 — GPIO (alt) |
| Pin 84 | RD4 — GPIO (alt) |
| Pin 85 | RD5 — GPIO (alt) |
| Pin 86 | RD6 — GPIO (alt) |
| Pin 87 | RD7 — GPIO (alt) |
| Pin 88 | RB8 — GPIO |
| Pin 89 | RB9 — GPIO |
| Pin 90 | RB10 — GPIO |
| Pin 91 | RB11 — GPIO |
| Pin 92 | RB12 — GPIO |
| Pin 93 | RB13 — GPIO |
| Pin 94 | RB14 — GPIO |
| Pin 95 | RB15 — GPIO |
| Pin 96 | VSS — Ground |
| Pin 97 | OSC1 — Primary oscillator crystal input |
| Pin 98 | OSC2 — Primary oscillator crystal output |
| Pin 99 | MCLR — Master clear reset (active low) |
| Pin 100 | VDD — Core supply 2.3-3.6 V |
Typical Applications
PIC32MX764F128L-I/PF is suitable for 6 applications: Industrial Ethernet Gateway, USB-to-UART Bridge, Automotive CAN Body Controller, Embedded Web Server with USB, Medical Data Acquisition Terminal, Home Automation Hub.
Industrial Ethernet Gateway
The PIC32MX764F128L-I/PF's integrated 10/100 Mbit Ethernet MAC with MII/RMII and 80 MHz MIPS32 core make it a strong fit for industrial Ethernet gateways that translate Modbus TCP, EtherNet/IP, or PROFINET traffic to legacy RS-485 sensor networks. The MAC connects to a typical external PHY (e.g., DP83848) and supports DMA-driven TCP/IP stacks such as Microchip's MPLAB Harmony Net Services. Two CAN 2.0b modules additionally bridge CANopen or DeviceNet trunks, making this MCU a single-chip industrial protocol gateway. The 100-pin TQFP exposes 5 UARTs, ideal for multi-protocol bridging.
Recommended
USB-to-UART Bridge
The PIC32MX764F128L-I/PF integrates a USB 2.0 Full-Speed On-The-Go controller with PHY, plus 5 UARTs with Peripheral Pin Select. This makes it a flexible USB-to-multi-UART bridge for industrial PCs, kiosks, or POS terminals needing serial port expansion. Running at 80 MHz, the MIPS32 core can service 921600 baud on all 5 UARTs simultaneously while handling USB CDC-ACM enumeration. The 32 KB RAM is sufficient for small command buffers and the 128 KB Flash stores firmware updates via USB DFU bootloader.
Recommended
Automotive CAN Body Controller
The PIC32MX764F128L-I/PF's dual CAN 2.0b controllers and 16-bit Parallel Master Port make it well suited to automotive body controllers that drive lamps, mirrors, and door modules across CAN bus. The integrated CAN controllers support 1 Mbit/s on each port with hardware acceptance filtering, offloading bus arbitration from the CPU. The 100-pin TQFP and 85 GPIO lines handle direct lamp/H-bridge drive. Note: this is the industrial -40C to +85C grade; for AEC-Q100 qualified automotive deployment use the PIC32MX564F128LT-I/PT or newer automotive-qualified families.
Recommended
Embedded Web Server with USB
The PIC32MX764F128L-I/PF's Ethernet MAC plus USB On-The-Go make it well suited to small embedded web servers that expose a web UI to industrial equipment, with USB for local configuration via a memory stick. The integrated PHY interface connects to a 50 MHz reference clock; software stacks like Microchip's TCP/IP Lite fit within 32 KB RAM. The 80 MHz CPU handles HTTP responses with sub-10 ms latency. The 4 DMA channels free the CPU from packet copying.
Recommended
Medical Data Acquisition Terminal
The PIC32MX764F128L-I/PF's 10-bit 1 MSPS ADC and 16-channel DMA-driven scanning make it suitable for medical-grade data acquisition terminals that read multiple analog signals from patient monitoring sensors. The 80 MHz core runs signal-processing filters on each sample; the USB On-The-Go port exports captured data to a host PC for clinician review. The 100-pin TQFP and -40C to +85C industrial temperature range suit point-of-care cart applications. For full IEC 60601 medical safety certification, additional external isolation and dedicated MCU family selection are required.
Recommended
Home Automation Hub
The PIC32MX764F128L-I/PF's combination of Ethernet, USB, dual CAN, and 5 UARTs makes it a hub MCU for home automation gateways bridging Wi-Fi/Ethernet to wired CAN-based lighting, RS-485 HVAC, and USB media inputs. Running at 80 MHz, the MIPS32 core can service Zigbee/Thread co-processor commands over UART while streaming HVAC data over Ethernet. The 32 KB RAM fits typical home automation protocol stacks; for richer Matter or Thread Border Router firmware, the PIC32MX675F512L-80I/PF with 512 KB Flash is the natural upgrade path.
Recommended
Recommended Products Summary
Engineering reference data for PIC32MX764F128L-I/PF — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PIC32MX675F512L-80I/PF | PIC32MX564F128L-I/PF | PIC32MX460F512L-80I/PT | PIC32MX764F128L-I/BG |
|---|---|---|---|---|---|
| Package | 100-TQFP (14x14 mm) | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-TQFP (14x14 mm) - same | 100-BGA (10x10 mm) - different |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Maximum CPU Clock | 80 MHz | 80 MHz | 80 MHz | 80 MHz | 80 MHz |
| Flash Memory | 128 KB | 512 KB (+300%) | 128 KB (same) | 512 KB (+300%) | 128 KB (same) |
| RAM | 32 KB | 64 KB (+100%) | 32 KB (same) | 64 KB (+100%) | 32 KB (same) |
| Ethernet MAC | Yes (10/100) | Yes (10/100) | No | No | Yes (10/100) |
| USB | USB 2.0 OTG | USB 2.0 OTG | USB 2.0 OTG | No | USB 2.0 OTG |
| CAN 2.0b | 2 modules | 2 modules | 2 modules | 1 module | 2 modules |
| Approx. Unit Price (qty 1) | $11.21 | $12.40 | $9.50 | $13.10 | $11.40 |
| Lifecycle Status | Active | Active | Active | Active | Active |
Key Differentiators
- Integrated Ethernet MAC + USB OTG + dual CAN in one 100-pin TQFP (vs PIC32MX460F512L-80I/PT)
- More Flash than entry-level PIC32MX5 family (vs PIC32MX575F256L-80I/PF)
- 100-TQFP availability in industrial -40C to +85C grade (vs PIC32MX764F128HT-V/MR)
Design Notes
The PIC32MX764F128L-I/PF has four VDD/VSS pairs (pins 17/18, 41/42, 63/64, 74/75, 96 GND). Decouple each pair with a 100 nF ceramic cap within 5 mm, plus a bulk 10 uF tantalum or ceramic at the regulator output. Estimated: at 80 MHz full-load, the core draws approximately 60 mA; budget 200 mA worst-case for the entire 3.3 V rail including Ethernet PHY and USB VBUS.
Route the 50 MHz Ethernet reference clock to the external PHY with controlled 50 ohm microstrip impedance and length matching within 100 mils. Keep the PHY differential pair (TX+/TX-, RX+/RX-) within 5 mil length matching. According to Microchip's PIC32MX family hardware design checklist, isolate the analog supply (AVDD/AVSS) from the digital supply with a ferrite bead and dedicated LDO to keep ADC readings below 5 LSB error.
The 100-TQFP package dissipates up to approximately 600 mW at 80 MHz full activity. Estimated: with theta_JA around 35 C/W on a 4-layer JEDEC test board, junction temperature rise above ambient is roughly 21 C; ensure ambient stays below 64 C for the 85 C industrial ceiling. Provide a copper pour on the top layer under the package for additional heat spreading if your enclosure restricts airflow.
Do not apply VBUS (USB pin 73) higher than 5.5 V - the USB VBUS detect pin is 5 V tolerant, but the surrounding VDDIO is 3.6 V max. Always configure the JTAG debugger pins (PGED1/PGEC1, RB0/RB1) to digital inputs at reset or they can interfere with boundary-scan. When using the Ethernet MAC, the External PHY must supply a 50 MHz reference clock; a missing PHY clock will hang the MAC indefinitely.
USB DP/DM traces must be 90 ohm differential with length matching within 150 mils. Place the 15 kohm pull-down on DM and 1.5 kohm pull-up on DP through a soft-start controlled by the OTG controller; this prevents inadvertent device enumeration during reset. For CAN, place a 120 ohm termination at each end of the bus, never in the middle, and add TVS protection for industrial transients up to 8 kV ESD.
Compliance Information
Industrial grade -40C to +85C. AEC-Q100 not qualified; for AEC-Q100 applications use PIC32MX automotive-qualified variants. RoHS compliant per Microchip product page.