PN7161B1HN - NFC Controller, 13.56MHz, NCI, VFQFN-40 | NXP
MPN: PN7161B1HN ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.88 | $7.88 |
| 10 | $7.1 | $71.00 |
| 100 | $6.4 | $640.00 |
| 500 | $5.75 | $2,875.00 |
| 1,000 | $5.2 | $5,200.00 |
PN7161B1HN Overview
An NFC controller is a near-field communication front-end IC that handles the analog RF layer (antenna tuning, modulation/demodulation) and exposes a standardized digital command interface (NCI) to a host application processor. NCI controllers like the PN7161B1HN offload the timing-critical contactless protocol stack from the host CPU, enabling the application processor to run the user-facing payment, access-control, or pairing logic while the PN7161B1HN manages RF compliance and certification requirements. Within the broader system hierarchy, an NFC controller sits under the wireless connectivity IC category, alongside Wi-Fi and Bluetooth transceivers, and is typically paired with a secure element for payment systems.
Key features include integrated firmware supporting EMV L1 and NFC Forum specifications, a host SPI interface up to 15 MHz, support for Apple ECP (Enhanced Contactless Polling), and dynamic power control. The device supports a wide supply range: 1.65 V to 1.95 V for the digital interface (typical 1.8 V) and 3.0 V to 3.6 V for the RF analog and main supply (typical 3.3 V). The exposed thermal pad on the VFQFN-40 package enables efficient heat dissipation during continuous RF operation. Typical RF output power is sufficient to drive standard contactless reader antennas at the 13.56 MHz carrier frequency used across all major contactless standards.
The PN7161B1HN integrates a high-performance ARM Cortex-M0 microcontroller core running NXP's certified NFC firmware stack, an AWC (Active Waveform Control) transceiver for improved RF performance, and on-chip tuning capacitor banks. The architecture separates the host-facing digital domain (1.8 V SPI/I2C) from the RF/analog domain (3.3 V), simplifying integration with low-voltage application processors. EMV L1 certification pre-compliance reduces end-product time to market for payment terminal designs.
Typical applications include EMV contactless payment terminals, Apple Pay merchant terminals (ECP-enabled), NFC point-of-sale readers, access control readers, and consumer electronics pairing/identification. The PN7161B1HN is also deployed in industrial NFC readers where EMV and NFC Forum certification is required.
When designing with the PN7161B1HN, place the matching network and EMC filter components as close as possible to the RFD_TX/RX pins and ensure the exposed pad is soldered to a sufficient ground plane for thermal relief. The host should run NXP's NCI driver stack and validate antenna matching against the target environment (metal housings, ferrite sheets) to achieve EMV L1 compliance.
This page synthesizes distributor pricing, drop-in alternatives, EMV/NFC application guidance, and practical design notes that complement the official NXP datasheet and EMV L1 certification documentation.
Drop-in alternatives for PN7161B1HN — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with PN7161B1HN (same form factor and footprint) — differing in Host Interface, Package, Supported Protocols, Apple ECP Support, Function.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
PN7160A1HN
✅ Drop-In✓ In Stock
$2.15 / Unit
View Datasheet →PN7161A1HN
✅ Drop-In✓ In Stock
$4.72 / Unit
View Datasheet →PN7161B1HN/C100
✅ Drop-In📋 Reference alternative (not in catalog)
PN7161B1HN/C100Y
✅ Drop-In📋 Reference alternative (not in catalog)
PN7161B1HN/C100E
✅ Drop-In📋 Reference alternative (not in catalog)
PN7161B1HN Specifications
| Manufacturer | NXP Semiconductors |
| Part Number | PN7161B1HN |
| Function | NFC Controller (RFID Reader/Transponder IC) |
| Operating Frequency | 13.56 MHz |
| Supported Protocols | FeliCa, ISO 14443, ISO 15693, MIFARE, NFC Forum, EMV L1 |
| Host Interface | SPI (NCI - NFC Controller Interface) |
| Digital Supply Voltage (VDD) | 1.65 V to 1.95 V (typical 1.8 V) |
| RF/Analog Supply Voltage (VBAT) | 3.0 V to 3.6 V (typical 3.3 V) |
| Apple ECP Support | Yes |
| EMV Compliance | EMV L1 Compliant |
| Package | 40-VFQFN Exposed Pad |
| Mounting Type | Surface Mount |
| Moisture Sensitivity Level (MSL) | 3 |
| Peak Reflow Temperature | 260 C |
| RoHS Status | Compliant |
PN7161B1HN 40-vfqfn exposed pad Pin Configuration Guide
Pin configuration for PN7161B1HN (40-vfqfn exposed pad package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for PN7161B1HN.
Refer to the datasheet for full pin configuration.
Typical Applications
PN7161B1HN is suitable for 6 applications: EMV Contactless Payment Terminals, NFC Forum Peer-to-Peer and Reader Mode, Apple Pay Merchant Terminals (ECP), Industrial Access Control and Identification, Consumer Electronics NFC Pairing and Setup, Public Transport and Transit Fare Readers.
EMV Contactless Payment Terminals
The PN7161B1HN is engineered for EMV L1 compliant contactless payment terminals. Its 13.56 MHz RF front-end supports ISO 14443 Type A/B and FeliCa, covering Visa payWave, Mastercard Contactless, American Express ExpressPay, and JCB J/Speedy. The integrated EMV L1 certified firmware stack eliminates the burden of running contactless protocol software on the host application processor, reducing BOM cost and shortening time-to-certification for payment terminal OEMs. Apple ECP support enables merchant-side Apple Pay acceptance on the same hardware. According to NXP documentation, the PN7161B1HN typically pairs with a secure element (e.g. SE050) and an EMV L2 kernel running on the host application processor for full payment certification.
Recommended
NFC Forum Peer-to-Peer and Reader Mode
Beyond payments, the PN7161B1HN supports all NFC Forum modes: Reader/Writer, Card Emulation, and Peer-to-Peer. Its 13.56 MHz carrier with active wave shaping and integrated tuning capacitor banks delivers robust read range across ISO 14443 and ISO 15693 transponders. The exposed-pad VFQFN-40 package enables compact PCB integration in tablets, laptops, and access control readers. NXP documentation notes the PN7161B1HN NCI interface plugs directly into the Linux NFC subsystem (neard) and Windows NFC class driver, eliminating the need for proprietary host-side NFC protocol code.
Recommended
Apple Pay Merchant Terminals (ECP)
Apple Enhanced Contactless Polling (ECP) is a required capability for any merchant terminal seeking to support the latest Apple Pay features including Apple Pay Later, rewards integration, and transaction continuity across iOS devices. The PN7161B1HN firmware revision B1 is the Apple ECP-enabled variant of NXP's PN7161 family, providing the Apple-defined ECP signaling on top of the standard ISO 14443 contactless layer. According to NXP product information, this makes the PN7161B1HN the de facto NFC front-end for new payment terminal designs targeting iPhone acceptance at retail point of sale.
Recommended
Industrial Access Control and Identification
The PN7161B1HN's support for ISO 15693 (vicinity) and ISO 14443 (proximity) transponders makes it suitable for industrial access control, time-and-attendance terminals, and asset tracking readers. Its dual supply rails (1.8 V host + 3.3 V RF) simplify integration with industrial host processors such as NXP's i.MX RT and LPC families. The exposed thermal pad handles continuous RF operation in access gate readers that read credentials at high duty cycle. According to NXP documentation, the firmware's flexible transponder handling supports custom commands to proprietary MIFARE Classic and DESFire EV2 transponder populations deployed in corporate badge systems.
Recommended
Consumer Electronics NFC Pairing and Setup
Consumer electronics such as headphones, smart speakers, and home automation hubs increasingly use NFC for tap-to-pair and Wi-Fi handover. The PN7161B1HN's NCI host interface allows the device to communicate directly with Android's NFC service and Apple's Core NFC framework, enabling standardized NFC Forum tag-reading and peer-to-peer setup flows. The 40-VFQFN exposed-pad package occupies less than 25 mm² of PCB area, fitting inside small form-factor consumer products. According to NXP product documentation, dynamic power control reduces quiescent current in standby, extending battery life in portable consumer devices.
Recommended
Public Transport and Transit Fare Readers
Public transit readers require fast, reliable ISO 14443 transaction handling with low latency for tap-and-go throughput at gates and validators. The PN7161B1HN's 13.56 MHz RF front-end combined with EMV L1-equivalent firmware quality supports the demanding transaction time budgets of transit operators (typically under 300 ms). According to NXP product information, the controller's on-chip tuning capacitor banks simplify antenna matching across multiple transit transponder standards including MIFARE DESFire, FeliCa (used in Japan), and Calypso. The exposed thermal pad and industrial temperature range option (C100E variant) suit outdoor fare gate environments.
Recommended
Recommended Products Summary
Engineering reference data for PN7161B1HN — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | PN7160A1HN | PN7161A1HN | PN7161B1HN/C100 | PN7161B1HN/C100Y | PN7161B1HN/C100E |
|---|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 40-VFQFN Exposed Pad | 40-VFQFN Exposed Pad - same | 40-VFQFN Exposed Pad - same | 40-VFQFN Exposed Pad - same | 40-VFQFN Exposed Pad - same | 40-VFQFN Exposed Pad - same |
| Operating Frequency | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz |
| Host Interface | SPI (NCI) | SPI (NCI) | SPI (NCI) | SPI (NCI) | SPI (NCI) | SPI (NCI) |
| EMV L1 Compliance | Yes | No | No | Yes | Yes | Yes |
| Apple ECP Support | Yes | No | No | Yes | Yes | Yes |
| Digital Supply (VDD) | 1.65 V to 1.95 V | 1.65 V to 1.95 V | 1.65 V to 1.95 V | 1.65 V to 1.95 V | 1.65 V to 1.95 V | 1.65 V to 1.95 V |
| RF Supply (VBAT) | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
Key Differentiators
- EMV L1 certified firmware with Apple ECP support pre-integrated (vs PN7160A1HN)
- NFC Plug and Play firmware vs. EMV payment firmware (vs PN7161A1HN)
- Identical VFQFN-40 footprint across the PN7160/PN7161 family (vs PN7161B1HN/C100Y)
Design Notes
Place the EMC filter and matching network components (L/C) as close as possible to the RFD_TX and RFD_RX pins of the PN7161B1HN. The exposed thermal pad must be soldered to a continuous ground plane with at least 8 thermal vias (0.3 mm drill, 0.6 mm pitch) to dissipate heat during continuous RF transmission. Route the 13.56 MHz antenna traces as 50-ohm controlled impedance on the top layer with a continuous ground plane underneath to maintain antenna Q factor and regulatory emission compliance.
Use separate LDO regulators for the PN7161B1HN's digital (VDD, 1.8 V) and RF analog (VBAT, 3.3 V) rails. Decouple each supply pin with a 100 nF ceramic capacitor in parallel with a 4.7 uF bulk capacitor placed within 3 mm of the IC pins. The dual-rail architecture intentionally separates noisy RF transients from the host-facing digital domain; do not tie VDD and VBAT to the same regulator or supply rail.
Do not skip antenna matching for production units - while the PN7161B1HN includes on-chip tuning capacitors, the external matching network (typically a pi-network of two capacitors and one inductor) must be tuned for the specific antenna geometry and target environment (metal housing, ferrite sheet, battery). Failing to tune the antenna will reduce read range and may cause EMV L1 certification failures. Validate the antenna matching with a vector network analyzer across the 13.56 MHz +/- 500 kHz band before submitting for EMV L1 laboratory testing.
Keep the SPI bus between the host application processor and the PN7161B1HN under 50 mm in length. Use series damping resistors (22-33 ohm) on the SPI clock and data lines if the bus exceeds 25 mm, to suppress ringing. The IRQ line from the PN7161B1HN should be pulled high to VDD with a 10 kohm resistor and routed away from the RF antenna traces to avoid coupling of the 13.56 MHz carrier into the host interrupt logic.
Compliance Information
RoHS compliant per NXP product page and distributor listings. EMV L1 contactless certification is a separate compliance scope; AEC-Q100 automotive qualification is not applicable for this consumer/payment-grade part.
