ADC/DAC
Produtos (2518)
MAX11607EWC+ - 10-Bit 4-Ch I2C ADC 94.4 kSps | Maxim Integrated
The Maxim Integrated MAX11607EWC+ is a 10-bit, low-power, multi-channel successive-approximation analog-to-digital converter (SAR ADC) with an I2C-compatible 2-wire serial interface, supplied in a 12-ball WLP (Wafer-Level Package) measuring 2.14 mm x 1.56 mm. The device integrates an internal track/hold amplifier, voltage reference, and conversion clock, sampling up to 94.4 kSps while drawing only 670 uA at maximum throughput. It operates from a single 2.7 V to 3.6 V supply, making it a strong fit for low-voltage, battery-powered designs. An SAR ADC is a type of analog-to-digital converter that uses a successive-approximation register and an internal DAC to binary-search the input voltage against a reference, producing one bit per clock cycle in a fixed N-cycle conversion. SAR ADCs sit within the broader ADC hierarchy (SAR -> Nyquist-rate ADC -> data converter -> mixed-signal IC), and are prized for deterministic latency, low power, and excellent DC accuracy at moderate sample rates compared to delta-sigma or pipelined architectures. Key features of the MAX11607EWC+ include 4 analog input channels (configurable for unipolar or pseudo-differential operation on related family parts), 10-bit resolution with no missing codes, an internal 2.5 V reference (also configurable to use an external reference), a 2-wire I2C-compatible interface with software-configurable slave addresses, and an industrial operating temperature range of -40 C to +85 C. The wide supply range and low quiescent current suit battery-powered and portable instruments. The internal 2.5 V bandgap reference, single-cycle conversion, and high-impedance analog inputs let designers replace larger discrete ADC front-ends. The compact WLP-12 footprint frees board area in space-constrained wearables and sensor modules, and the I2C interface minimizes GPIO consumption on low-pin-count microcontrollers. Typical applications include handheld battery-powered instrumentation, sensor signal conditioning and digital conversion (temperature, pressure, strain-gauge bridges via front-end gain stages), portable medical devices such as glucose meters and pulse oximeters, factory automation modules, and consumer audio front-end level metering. The 4-channel input is ideal when several sensors share one ADC. When designing with this device, place 0.1 uF bypass capacitors close to the AVDD pin and route analog and digital grounds as separate planes joined at a single point. For inputs exceeding the internal reference range, add an external front-end attenuator or use the external-reference mode with a higher-VREF source. Verify I2C pull-up sizing for the target bus speed (up to 1.7 MHz on this family) and the master's sink current capability. This page synthesizes distributor pricing, parametric context from the manufacturer datasheet, drop-in alternative candidates from the MAX11606-MAX11611 family, and practical design notes not found in the manufacturer datasheet alone.
MAX11615EEE+TC78 - 12-Bit 8-Ch I²C Low-Power ADC | Maxim Integrated
The Maxim Integrated (Analog Devices) MAX11615EEE+TC78 is a low-power, 12-bit, 8-channel successive-approximation analog-to-digital converter (SAR ADC) with internal track/hold, voltage reference, clock, and an I²C-compatible 2-wire serial interface, supplied in a 16-pin QSOP package on a 178 mm (7-inch) Tape & Reel carrier format (TC78 reel code). A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a type of low-power, medium-resolution data converter that uses a binary search algorithm against an internal DAC to digitize an analog input in N conversion cycles for N-bit resolution. SAR ADCs sit within the data-converter IC family, which belongs to the broader mixed-signal semiconductor category. They are favored in multiplexed channel applications because they offer deterministic latency, low quiescent power, and a small package footprint versus integrating or pipeline ADCs. The MAX11615EEE+TC78 operates from a single 2.7V to 3.6V supply, draws only 670 µA at the maximum 94.4 ksps sampling rate, and supports both 400 kHz Fast-Mode and 1.7 MHz High-Speed-Mode I²C operation. On-chip features include an internal 2.048V reference, an internal oscillator, software-configurable unipolar/bipolar input range, and four GPIO-capable digital I/O pins that can be used for analog input channel expansion. The QSOP-16 footprint makes it well-suited for space-constrained portable instruments. Typical applications include portable and battery-powered data loggers, handheld multimeters, patient monitoring front-ends, industrial sensor conditioning loops, 4–20 mA loop powered transmitters, programmable logic controllers (PLCs), and consumer audio front-panel control. The wide analog input range and internal reference simplify the analog front-end while keeping external component count low. When designing with this ADC, place 0.1 µF decoupling capacitors as close as possible to the AVDD and DVDD pins, and use a low-impedance analog ground plane to minimize channel-to-channel crosstalk. The I²C address is hardware-selectable via the AD0 pin, allowing two devices to coexist on the same bus without external glue logic. This page synthesizes distributor pricing, same-family and cross-brand drop-in alternatives, and practical design notes not consolidated in the manufacturer datasheet alone.
MAX11627EEE/V+ - 12-Bit 300ksps 4-Ch ADC | Analog Devices
The Analog Devices MAX11627EEE/V+ is a 12-bit, 300 ksps, low-power, 4-channel SAR analog-to-digital converter with an integrated 4.096V reference, FIFO buffer, and SPI-compatible serial interface, housed in a 16-pin QSOP package. The /V suffix denotes the automotive-grade temperature range (-40C to +85C) screened variant of the base MAX11627EEE+ industrial-grade ADC. An SAR (Successive Approximation Register) ADC is a type of analog-to-digital converter that uses a binary search algorithm and a precision DAC to converge on the input voltage in N conversion cycles, where N equals the bit resolution. SAR ADCs sit within the broader hierarchy of data-converter ICs (ADC -> data converter -> mixed-signal IC -> semiconductor) and are favored for medium-speed, medium-resolution applications where deterministic latency, low power, and small package size matter more than the very highest sample rates. The MAX11627 family (MAX11626/MAX11627/MAX11628/MAX11629) shares a common core and differs primarily in input channel count: 4 / 4 / 8 / 12 channels respectively. Key features of the MAX11627EEE/V+ include 300 ksps throughput, an internal 4.096V reference (eliminates external reference IC and saves BOM cost), a 16-deep FIFO that offloads host-processor interrupts, single 5V analog supply operation, low 3.5 mA supply current at full speed, and a hardware-/CSB-only shutdown mode that drops current to < 10 uA. The 16-QSOP footprint is industry-standard for multi-channel SAR ADCs, enabling drop-in placement on existing designs that already use a 16-pin QSOP ADC. Architecturally, the MAX11627 is built on a CMOS process with a switched-capacitor SAR core, an integrated low-drift bandgap reference, a 4-input analog multiplexer with track-and-hold, and an SPI-compatible mode-0/mode-3 serial interface that supports daisy-chaining of multiple devices on a single bus. The internal FIFO decouples conversion throughput from host read latency, allowing the host to burst-read groups of samples efficiently. Typical applications include portable industrial data loggers, multi-loop process-control analog input modules, automotive sensor interfaces, battery-cell voltage monitoring, and HVAC controller boards. The 4-channel count matches the typical "current + temperature + pressure + flow" sensor bundle for a single machine subsystem. When designing with this device, note that the 5V analog rail (AVDD) and the 3V/5V digital rail (DVDD) are independent supplies and must be decoupled separately. The internal reference does not require an external bypass capacitor, but adding 0.1 uF + 10 uF on AVDD and 0.1 uF on DVDD is recommended to keep digital switching noise out of the SAR conversion result. This page synthesizes distributor pricing, automotive/industrial grade comparison, drop-in QSOP-package alternatives, and practical design notes not found in the bare manufacturer datasheet.
MAX11627EEE/V+CLS - 12-Bit 300ksps SAR ADC | Maxim Integrated
The Maxim Integrated MAX11627EEE/V+CLS is a 12-bit, 300ksps successive-approximation analog-to-digital converter with a 16-entry FIFO and internal 2.5V reference, offered in a 16-pin QSOP package. The automotive-grade +V/CLS suffix indicates parts tested to customer-specific lot and screening requirements, paired with a 12-bit SAR core, four analog input channels, and a 10MHz SPI/QSPI/MICROWIRE-compatible serial interface. A successive-approximation register (SAR) ADC is a converter architecture that performs one bit-trial per clock cycle using an internal binary-weighted capacitor DAC and a comparator, trading absolute speed for low power consumption and deterministic latency. The MAX11627 belongs to the wider MAX11626-MAX11629 ADC family - all 4-/8-/12-/16-channel low-cost SAR converters with FIFO and on-chip reference - which sit inside the Maxim precision-data-converter portfolio alongside higher-throughput pipeline ADCs and sigma-delta converters. SAR parts are commonly chosen for multiplexed multi-channel sensor acquisition where the channel-to-channel latency must remain deterministic for control-loop stability. Key parametric features include ±1 LSB INL and ±1 LSB DNL with no missing codes over temperature, an internal 2.5V reference (also supports an external 1V to VDD reference), a 16-entry FIFO with scan-mode and internal averaging, an internal conversion clock, and a 4-channel analog input mux. The 16-pin QSOP package is the same physical footprint used across the MAX11626/MAX11627/MAX11628/MAX11629 family, allowing direct PCB migration between channel counts within the family. The architecture is a classic charge-redistribution SAR with a sample-and-hold front end and a 12-bit resolution core. The internal FIFO offloads 16 conversion results, enabling burst-mode acquisition without continuous processor intervention and reducing SPI bus traffic for power-constrained MCUs. Typical applications include automotive sensor acquisition (battery monitoring, current sensing, position feedback), industrial process control loops, multi-channel data loggers, portable instrumentation, and factory-automation front-ends. The +CLS automotive suffix makes this specific variant preferred for safety-critical or harsh-environment designs where customer-specific lot traceability is contractually required. A key design consideration is that the FIFO depth and scan-mode registers must be configured via the SPI before conversion start; misprogramming the scan-mode register is the most common cause of missing-channel errors in production. Inputs AIN0-AIN3 are software-muxed; unused analog inputs should be tied to mid-supply to minimize crosstalk into the active channel. This page synthesizes distributor pricing, parametric proximity analysis against same-family drop-in parts, and practical SPI configuration notes that are not consolidated in any single manufacturer document.
MAX11627EEE/V+T - 12-Bit 300ksps SAR ADC w/ FIFO | Maxim
The Maxim Integrated (Analog Devices) MAX11627EEE/V+T is a 12-bit, 300 ksps, low-power successive-approximation analog-to-digital converter with 4 analog input channels, an internal 2.5V reference, an internal 2.048 MHz oscillator, and a 16-entry FIFO housed in a 16-pin QSOP package. The /V suffix denotes the automotive-grade (AEC-Q100) screening, and the +T suffix denotes tape-and-reel packaging. The MAX11627 is part of a six-member family (MAX11626-MAX11629 and MAX11632/MAX11633) that shares a common serial interface and pinout but differs in channel count, reference voltage, and FIFO depth. A successive-approximation register (SAR) ADC is a sampling converter architecture that performs one bit decision per internal clock cycle using a binary-search algorithm against a precision DAC. SAR ADCs are valued for deterministic latency, no pipeline delay, and excellent DC accuracy at moderate sample rates, placing them between low-speed delta-sigma converters and high-speed pipeline ADCs in the data-converter hierarchy. The 16-entry FIFO on the MAX11627 decouples the host sample rate from the conversion rate, allowing the host to sleep between block transfers and reducing SPI bus traffic in power-constrained or interrupt-driven embedded designs. Key features include 4 single-ended analog inputs (0 to VREF range), 12-bit resolution with ±1 LSB INL and ±1 LSB DNL and no missing codes over temperature, 300 ksps maximum throughput, an internal 2.5V reference, scan-mode auto-sequencing, internal averaging, 10 MHz SPI/QSPI/MICROWIRE-compatible serial interface, an internal clock that eliminates an external crystal, and a low 2.7V-3.6V analog supply. The /V automotive variant adds extended qualification per AEC-Q100, suiting the part for body-electronics, sensor, and industrial-sensor applications where -40C to +85C operation is required. Typical applications include automotive sensor interfaces (e.g., pedal position, throttle, HVAC flap position), industrial multi-channel data-acquisition modules, battery-monitoring systems for 12V/24V lead-acid and lithium packs, portable instrumentation front ends, and any 3.3V-rail embedded design that needs 12-bit multi-channel conversion with host-monitored data movement. The internal reference and internal clock minimize external BOM, while the FIFO reduces microcontroller wake-up frequency for power-budget-sensitive applications. When designing with the MAX11627EEE/V+T, place the 0.1 uF + 10 uF decoupling pair as close as possible to AVDD and DVDD pins, keep the analog input traces short and guarded, and bypass REF with the 10 uF capacitor recommended in the manufacturer datasheet. The internal reference can source up to 1 mA, so any external load beyond ratiometric must be buffered. This page synthesizes distributor pricing, FIFO-aware firmware design notes, AEC-Q100 qualification details, and drop-in replacement options not aggregated in the manufacturer datasheet, providing a single engineering decision surface for embedded design teams evaluating the MAX11627 family.
MAX11627EEE/V+TCLS - 12-Bit 300ksps ADC w/ FIFO, QSOP-16 | Maxim
The Maxim Integrated (Analog Devices) MAX11627EEE/V+TCLS is a 12-bit, 300 ksps successive-approximation ADC with internal reference and FIFO in a 16-pin QSOP package. It combines an SPI/QSPI/MICROWIRE-compatible serial interface, internal 4.096 V reference, and an internal FIFO that simplifies burst sampling without host intervention. An ADC (Analog-to-Digital Converter) is a semiconductor device that converts a continuous-time analog voltage into a discrete digital code. Successive-approximation (SAR) ADCs use an internal DAC and comparator to binary-search the input, achieving 12-bit resolution at up to 300 ksps while consuming only a few milliwatts. SAR ADCs sit within the broader hierarchy of mixed-signal ICs and are widely used in industrial control, instrumentation, and sensor-interface signal chains where moderate speed and precision are required. Key specifications include 12-bit resolution, 300 ksps maximum sampling rate, single-ended analog inputs across 4, 8, 12, or 16 channels (family-wide), an internal 4.096 V reference, an internal FIFO for autonomous burst capture, and a low-power shutdown mode. The QSOP-16 (5.0 mm × 3.0 mm body) package exposes all analog, digital, and power pins, while the SPI serial interface supports daisy-chaining of multiple MAX1162x devices on a single bus. Internally, the device uses a capacitive charge-distribution SAR architecture, an on-chip bandgap-derived reference with factory-trimmed accuracy, and dedicated input track-and-hold circuitry. The result is excellent AC performance at low conversion rates without requiring external precision components or calibration. Typical applications include multichannel data-acquisition front ends, patient monitoring, sensor-array sampling, HVAC controllers, and portable instrumentation. The wide channel count and FIFO make the device well suited to scanning multiple analog signals before waking a microcontroller to read the conversion queue. Design with this part using the recommended 0.1 uF decoupling capacitor close to VDD, and place the analog inputs on quiet ground-referenced traces routed away from switching lines. Confirm that host MCU SPI timing satisfies the 40 ns minimum SCLK period specified in the datasheet. This page synthesizes distributor stock, drop-in alternatives, and design notes that the manufacturer datasheet alone does not aggregate.
MAX1162ACUB+T - 16-Bit 200ksps +5V SAR ADC | Analog Devices
The Analog Devices (Maxim Integrated) MAX1162ACUB+T is a 16-bit, 200 ksps successive-approximation analog-to-digital converter (SAR ADC) with a single +5V supply input, an automatic power-down feature that drops quiescent current to 10 µA between conversions, and a high-speed 1.1 µs wakeup time, housed in a 10-pin µMAX (TSSOP-equivalent) package. A SAR ADC is a type of data converter that performs a binary search through an internal capacitive DAC to digitize an analog signal in N conversion cycles for N bits of resolution. As part of the broader data-acquisition signal chain (sensor -> front-end amplifier -> anti-alias filter -> ADC -> digital host), SAR ADCs are prized for deterministic latency, low latency-to-sample ratios, and excellent DC accuracy without the pipeline delay of pipelined architectures. Key specifications include 16-bit no-missing-codes performance, an input-voltage range of 0 to VREF, an internal 4 MHz track-and-hold, an SPI/QSPI/MICROWIRE-compatible serial output. The MAX1162ACUB+T integrates the reference buffer internally, so only an external reference voltage (typically +5V for full-scale) is required. The automatic shutdown between conversions reduces average supply current dramatically at lower throughput rates, making the part ideal for battery-powered and duty-cycled applications. Architecture-wise, the device uses a charge-redistribution capacitive DAC array combined with a precision comparator and successive-ration logic, with an internal input track-and-hold that accepts fast-slewing signals up to the conversion rate without external buffering. The serial interface is straightforward: CS, DOUT, and SCLK form a standard 3-wire SPI port compatible with most microcontrollers and DSPs. Typical applications include portable data loggers, hand-held measurement instruments, battery-powered sensors and instrumentation, industrial process control analog front-ends, and medical monitoring devices. Its small 10-pin uMAX footprint suits space-constrained PCB designs where density matters. When designing with this ADC, allocate adequate settling time for the external reference and add a 0.1 µF bypass capacitor close to VDD. The SSTRB (or DSP-style) output can be polled to confirm conversion completion before clocking out results. This page synthesizes distributor pricing, same-package drop-in alternatives, and practical design notes beyond what the manufacturer datasheet alone provides.
MAX1162AEUB+T - 16-Bit 200ksps SAR ADC | Analog Devices/Maxim
The Analog Devices / Maxim Integrated MAX1162AEUB+T is a 16-bit, 200ksps, low-power successive-approximation analog-to-digital converter (ADC) housed in a 10-pin uMAX/uSOP surface-mount package. The part operates from a single +5V supply, supports an input range of 0V to VREF, and offers 16-bit resolution with no missing codes. Average active supply current is on the order of a few milliamps, while automatic power-down between conversions drops quiescent current to 10uA, and wakeup from shutdown is 1.1us. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that samples a continuous analog voltage and converts it into a discrete digital code word. SAR (successive-approximation register) ADCs in particular use an iterative binary-search algorithm against an internal DAC, combining low latency with deterministic conversion time, making them well suited to multiplexed data-acquisition channels and control loops. The MAX1162AEUB+T fits within the broader hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Key features include an internal track-and-hold with 4MHz input bandwidth, an adjustable logic interface from +2.7V to +5.25V for easy connection to modern microcontrollers, hardware-software shutdown control, and an external reference input that lets the user trade full-scale range for noise. The 10-pin uMAX (10-uMAX/uSOP) package is compact enough for portable designs while exposing the SAR core's high-speed serial interface. Architecturally the MAX1162 uses a charge-redistribution SAR core with dedicated input T/H, allowing accurate acquisition of full-scale transitions at full 200ksps throughput. Serial data is clocked out LSB-first under user control, simplifying connection to SPI/QSPITM/MICROWIRE-compatible controllers or DSP serial ports. Operating temperature range spans -40C to +85C industrial grade. Typical applications include portable instrumentation and battery-powered data loggers, industrial process-control front ends, pen-tablet digitizers and touch-screen A/D channels, and medical instrument signal conditioning. The combination of low active power, automatic power-down, and fast wakeup makes it especially attractive for battery-powered data-acquisition systems that spend most of their time idle between conversions. A key design consideration is decoupling: place a 0.1uF ceramic bypass capacitor as close as possible to the AVDD pin and a bulk tantalum/ceramic reservoir on the logic supply side. Choose an external reference (such as the MAX6126) sized to the desired full-scale input and remember that conversion noise and INL will directly reflect reference quality. This page synthesizes distributor pricing, drop-in same-brand and cross-brand alternatives, and practical design guidance not found in the manufacturer datasheet, helping engineers select, source, and lay out the MAX1162AEUB+T with confidence.
MAX1165ACUI+ - 16-Bit 165ksps SAR ADC, Parallel | Maxim
The Maxim Integrated MAX1165ACUI+ is a 16-bit, low-power, successive-approximation analog-to-digital converter (SAR ADC) with a maximum sampling rate of 165 ksps and a single-ended analog input channel. It is housed in a 28-pin TSSOP package and uses a single +5V analog supply with automatic power-down between conversions, reducing supply current to microampere levels during idle intervals. An on-chip +4.096V reference and a track-and-hold front end eliminate the bulk of external analog design. An ADC (Analog-to-Digital Converter) is a mixed-signal data converter that transforms a continuous analog voltage into a discrete digital code, enabling microcontrollers, FPGAs, and DSPs to process real-world sensor and instrumentation signals. Successive-approximation ADCs use an internal binary-search algorithm combined with an internal DAC to resolve the input one bit per clock cycle, balancing speed, resolution, and power consumption. The MAX1165 family sits in the precision mid-speed converter segment of the data-converter hierarchy: ADC -> SAR ADC -> precision data converter -> mixed-signal IC -> semiconductor. Key specifications include 16-bit resolution with no missing codes, ±1 LSB INL (typical), ±0.5 LSB DNL (typical), and an aperture bandwidth compatible with 165 ksps throughput. The parallel interface (8+8 byte-mode or 16-bit word-mode) provides glitch-free readback without the timing overhead of a serial ADC, and the part offers software-configurable input ranges via the input scaling network. The TSSOP-28 footprint gives a compact 0.65 mm pitch, surface-mount solution suitable for high-density data-acquisition boards. Typical applications include industrial process-control loops, portable instrumentation and data loggers, battery-powered medical monitors, and multi-channel data-acquisition front ends using an external MUX. The wide input range and integrated reference simplify board-level design, while parallel output enables direct connection to a microcontroller external memory bus for high-throughput captures. When designing with this device, ensure the analog input is bandwidth-limited (RC filter, typically 1 kΩ/1 nF) to avoid aliasing, and add 0.1 µF decoupling close to AVDD and DVDD. The PD pin can be tied to a microcontroller GPIO for power management in portable designs. Compute scheme, supplier scheme, and pin-compatible Scheme B variants are summarized in the comparison table below.
MAX1165AEUI+ - 16-Bit Low-Power SAR ADC | Maxim Integrated
The Maxim Integrated MAX1165AEUI+ is a 16-bit, low-power, successive-approximation analog-to-digital converter (SAR ADC) with a parallel interface, housed in a 28-pin TSSOP package. It operates from a single 4.75V to 5.25V analog supply and a separate 2.7V to 5.25V digital supply, supporting throughput rates up to 165 ksps with automatic power-down between conversions to reduce average current draw. The part provides ±1 LSB INL (max), 100 dB SINAD, and a true-differential analog input stage with ±10V (MAX1165) or 0 to +10V (MAX1166) input ranges, selectable via software. A SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a type of data converter that resolves each conversion in a fixed number of clock cycles by successively comparing the sampled input against an internal binary-weighted capacitor DAC. SAR ADCs sit between flash and delta-sigma converters in the speed/resolution hierarchy: faster than delta-sigma at moderate resolution, much lower power than flash, and inherently free of pipeline latency. They are widely used in industrial process control, instrumentation, and data-acquisition front-ends where one conversion per sample is required. Key features of the MAX1165AEUI+ include ±1 LSB DNL (no missing codes), an internal 4.096V bandgap reference with the option to use an external reference, a hardware RDY/INT output, and an SPI-/QSPI-/MICROWIRE-compatible serial-mode option (selected at power-up via the INT/EOC pin). The reference architecture lets designers trade absolute accuracy against input range, and the internal oscillator eliminates the need for an external clock in many systems. The 28-TSSOP footprint makes it PCB-friendly for both hand prototyping and high-density acquisition modules. The MAX1165AEUI+ uses a charge-redistribution DAC with input T/H and auto-calibration on every conversion, giving excellent AC and DC performance across temperature. Power-down between conversions reduces supply current to under 1 mA in idle, making the device attractive for battery-backed instrumentation. The parallel interface allows direct connection to microcontrollers and DSPs without serial glue logic, and the asynchronous RDY signal simplifies interrupt-driven sampling. Typical applications include multi-channel PLC analog input modules, weigh-scale front-ends, transducer signal conditioning, and portable data loggers. The wide ±10V true-differential input range eliminates external signal-conditioning op-amps in many 4-20 mA-style loops, and the 165 ksps rate is sufficient for vibration analysis and motor-control current sensing. Designers commonly pair it with a precision op-amp buffer (MAX4475) and an isolated DC/DC to build complete 16-bit acquisition channels. When designing with the MAX1165AEUI+, ensure the analog and digital supplies are decoupled with separate 0.1 µF ceramic capacitors placed close to the AVCC and DVCC pins. The REF pin requires a 4.7 µF ceramic or tantalum bypass cap to meet the 100 dB SINAD specification; a smaller capacitor will degrade noise performance. Always read the RDY/INT pin via level-triggered interrupts rather than polling to avoid missed conversions at the full 165 ksps rate. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet — including same-brand family members like MAX1165ACUI+ and cross-brand pin-compatible ADCs from Analog Devices and TI.
MAX1165AEUI+T - 16-Bit 200ksps Low-Power SAR ADC | Maxim Integrated
The Maxim Integrated MAX1165AEUI+T is a 16-bit, low-power, successive-approximation analog-to-digital converter (ADC) with automatic power-down, a parallel interface, and a 200 ksps sampling rate, housed in a 28-pin TSSOP (EUI) package. It operates from a single +5V analog supply and a separate +3V to +5V digital supply, supports a unipolar 0 to +10V (MAX1165) or 0 to +5V (MAX1166) true-differential input range, and integrates a track-and-hold, clock, and internal 4.096V reference. A successive-approximation register (SAR) ADC is a class of Nyquist-rate converter that uses an internal binary-search algorithm to step a comparator-controlled DAC toward the analog input, producing one conversion per N clock cycles for N bits of resolution. The SAR architecture combines high accuracy with deterministic latency, which makes it well suited to multiplexed data-acquisition front ends, industrial process control loops, and any system that requires a stable per-sample latency without the pipeline delay of higher-speed flash or pipelined converters. The MAX1165AEUI+T belongs to the broader hierarchy of analog-to-digital converter -> data converter -> signal-chain IC -> semiconductor. Key features include 16-bit resolution with no missing codes, ±1.0 LSB INL and ±1.0 LSB DNL (max), a 100 kHz sinad of 86 dB, an internal +4.096V reference, and automatic power-down that reduces supply current to under 10 µA between conversions at reduced throughput. The parallel interface provides 8-/16-bit bus-compatible read cycles, simplifying connection to standard microcontrollers, FPGAs, and DSPs without a serial-port block. The internal reference and compact 28-pin TSSOP footprint reduce external BOM count and PCB area versus discrete ADC designs. Typical applications include data-acquisition systems, pen-digitizers and touch-screen controllers, battery-powered portable instruments, industrial process control, and digital signal processing front ends where deterministic latency, 16-bit resolution, and low power dissipation are required. Designers should connect AGND and DGND at a single low-impedance point, bypass AVDD and DVDD with 0.1 µF and 10 µF capacitors placed close to the pins, and respect the reference-bypass capacitor placement to achieve the datasheet-noise performance.
MAX1165BEUI+ - 16-Bit 200ksps SAR ADC, TSSOP-28 | Maxim Integrated
The Maxim Integrated (Analog Devices) MAX1165BEUI+ is a 16-bit, low-power, successive-approximation analog-to-digital converter (SAR ADC) with a 16-bit-wide parallel interface, housed in a 28-pin TSSOP package. It supports up to 200 ksps throughput, automatic power-down, a factory-trimmed internal clock, and an on-chip +4.096V reference. The MAX1165BEUI+ is the E-grade (commercial, 0C to +70C) version of the MAX1165 family; the B/C grade variants offer extended temperature ranges, and the MAX1166 variant uses a serial interface. An SAR ADC is a type of data converter that uses a successive-approximation algorithm to convert an analog input voltage to a digital code one bit at a time using a binary-search process across an internal DAC and comparator. SAR ADCs sit in the broader data-converter hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. They are prized for their low latency, deterministic acquisition, and excellent DC accuracy, making them ideal for multiplexed data-acquisition systems, instrumentation, and industrial process control. Key features of the MAX1165BEUI+ include a 16-bit resolution with no missing codes, ±1 LSB INL (max), ±1 LSB DNL (max), a single +5V analog supply, an analog input range of 0V to VREF, and a parallel 16-bit output bus. The device draws only 4.5 mA (typ) at 200 ksps and drops to 1 µA (typ) in power-down mode, enabling battery-friendly designs. The integrated 4.096V reference eliminates an external component in many designs, while the factory-trimmed internal oscillator removes the need for an external clock source. Architecturally, the MAX1165BEUI+ combines a capacitive-charge-distribution DAC, a high-bandwidth comparator, a successive-approximation register, and a precision bandgap reference. The track-and-hold amplifier acquires the input in 1.5 clock cycles, and the conversion completes in 16 clocks, giving a deterministic latency suitable for closed-loop control. The internal reference achieves ±0.5% initial accuracy and 30 ppm/C drift. Typical applications include multi-channel data-acquisition systems, pen digitizers, portable instrumentation, medical instrumentation, process control, and signal monitoring. The wide parallel bus enables direct connection to microcontrollers and DSPs without glue logic. When designing with this device, ensure the analog input is buffered if its source impedance exceeds 1 kΩ to avoid conversion errors. Place the bypass capacitors (10 µF tantalum + 0.1 µF ceramic) as close to AVDD and DVDD as possible, and keep analog and digital grounds separated to minimize digital-induced noise on the analog input. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the standalone manufacturer datasheet.
MAX1165BEUI+T - 16-Bit 165ksps Low-Power SAR ADC | Maxim Integrated
The Maxim Integrated MAX1165BEUI+T (Analog Devices Inc./Maxim Integrated) is a 16-bit, low-power, successive-approximation analog-to-digital converter (SAR ADC) with 16-bit wide parallel interface, delivering up to 165 ksps sampling rate in a 28-pin TSSOP package. It supports a single 5V analog supply, integrates a factory-trimmed internal 4.096V reference (also accepts an external reference), and provides automatic power-down (AutoShutdown) that reduces supply current to 0.1 mA at 10 ksps. The device operates from 4.75V to 5.25V with full-scale input range of 0 to VREF, and consumes only 1.8 mA at 165 ksps with an external reference. A successive-approximation register ADC (SAR ADC) is a type of data converter that resolves a single analog sample into a digital code through a binary-search algorithm across N clock cycles, producing one conversion per acquisition cycle. SAR ADCs are valued for their deterministic latency, intrinsic accuracy, low power consumption, and ease of use because they require no complex external sample-rate clocks. They sit within the broader data-converter hierarchy of ADC -> data converter -> signal-chain IC -> analog/mixed-signal IC, and are the workhorse of industrial instrumentation, multi-channel data acquisition, and precision sensor read-out systems. The MAX1165BEUI+T integrates a precision internal voltage reference, a wide parallel digital bus, and automatic power management. The 16-bit parallel interface simplifies connection to FPGAs, CPLDs, and high-performance microcontrollers, eliminating the timing overhead of serial peripherals. An external reference input allows system designers to optimize noise, drift, and full-scale range for specific transducer bridges or sensor outputs. The 28-pin TSSOP surface-mount package supports standard 0.65mm pitch PCB assembly and is compatible with automated pick-and-place production lines. Typical applications include industrial process control, multi-channel data-acquisition systems, portable instrumentation, and precision sensor signal conditioning. The combination of low operating power (1.8 mA at full speed) and aggressive power-down (0.1 mA at 10 ksps) makes it suitable for battery-powered measurement equipment where throughput is dominated by short bursts of acquisition separated by long idle intervals. Designers also use the part in optical sensor front ends, weigh scales, and medical instrumentation front-ends. When designing with this prototype, ensure the analog supply rail is properly decoupled close to the AVDD pin with a 10uF tantalum and 0.1uF ceramic pair, and that the reference decoupling capacitor (typically 10uF) is placed adjacent to the REF pin to absorb reference-charge glitches during conversion. The CONVST input must be a clean logic signal because internal switching transients may be re-coupled to the analog input if the sample-and-hold acquisition time is not respected. This page synthesizes distributor pricing, drop-in same-brand alternatives, design notes, and pinout detail not presented together in the manufacturer datasheet - a concise, source-backed reference for engineers.
MAX1166ACUP+T - 16-Bit 200ksps Low-Power SAR ADC | Maxim Integrated
The Maxim Integrated MAX1166ACUP+T (now ADI / Maxim Integrated) is a 16-bit, low-power, successive-approximation analog-to-digital converter (SAR ADC) with a parallel interface, housed in a 20-pin TSSOP package. It operates from a single +5V analog supply, accepts a 0V to +10V or bipolar analog input range, and delivers up to 200 ksps throughput while consuming only 2.5 mA typical operating current. The device includes an automatic power-down mode that drops supply current to under 1 mA between conversions, making it ideal for battery-powered data acquisition front ends. A successive-approximation ADC (SAR ADC) is a sampling converter that uses a binary-search algorithm against an internal precision DAC to resolve the analog input to N bits in N clock cycles. SAR ADCs combine the simplicity of a single analog input with deterministic latency, no pipeline delay, and excellent DC accuracy - the architecture is a member of the data converter family within the broader analog-to-digital converter hierarchy, which includes sigma-delta, pipeline, and flash converters. Key specifications include 16-bit resolution with no missing codes, an on-chip +4.096V reference, a 4-channel input multiplexer on the MAX1166 (single-ended or pseudo-differential), hardware-configurable unipolar/bipolar input ranges, and a parallel digital output bus. The internal reference is trimmed to 0.01% initial accuracy, eliminating the need for an external precision reference in many designs. An on-chip clock generator and sample/hold amplifier further minimize external component count. The MAX1166 uses a charge-redistribution DAC array followed by a low-noise comparator and successive-approximation register, all clocked by either the internal oscillator or an external clock applied at the CONVST/TMODE pin. Power-down between conversions is automatic and transparent to the user: a single CONVST rising edge initiates acquisition and conversion in one piece, after which the part returns to its nap state automatically. Typical applications include portable industrial data loggers, battery-powered sensor signal chains (strain gauge, thermocouple, RTD), medical instrumentation front ends, automotive sensor readback, and process-control analog input cards. The integrated reference and 4-channel input scan capability allow a complete 4-channel, 16-bit data acquisition front end to be built with a single IC plus a few passives. When designing with this part, pay attention to input protection: the analog input pins tolerate overvoltage to +/-16V with proper external clamping, and the digital supply (DVDD) should be derived from a clean 2.7V to 5.25V source to avoid coupling logic noise into the conversion result. Decouple AVDD with 10uF + 0.1uF ceramic at the pin. This page synthesizes distributor pricing, drop-in alternatives within the MAX1165/MAX1166 family, and practical PCB-level design notes that complement the manufacturer datasheet.
MAX1167C/D+ - 16-Bit 200ksps SAR ADC Die | Maxim Integrated
The Maxim Integrated MAX1167C/D+ (now part of Analog Devices) is a 16-bit, low-power, successive-approximation-register (SAR) analog-to-digital converter (ADC) supplied as an unpackaged die (D suffix). It integrates 4 analog input channels and a 1:1 sample-and-hold (S/H) to ADC architecture, enabling simultaneous-sampling-free, sequential-channel acquisition at up to 200 ksps aggregate throughput. The die-level form factor is intended for hybrid-module assemblies and chip-on-board (COB) designs where board area is at a premium and a conventional QSOP-16 package is not viable. An SAR ADC (Successive Approximation Register Analog-to-Digital Converter) is a Nyquist-rate data converter that uses a binary-search algorithm against an internal precision DAC to digitize an analog input in N conversion cycles for N bits of resolution. Within the broader data-converter taxonomy, the SAR ADC sits between flash converters (faster, lower resolution) and sigma-delta converters (higher resolution, lower bandwidth). Compared to sigma-delta ADCs of similar resolution, SAR converters offer deterministic latency and zero-latency single-shot conversion, which is critical for multiplexed multi-channel systems and control loops. The MAX1167 therefore belongs to the precision data acquisition IC class within the signal-chain hierarchy: ADC -> data converter -> mixed-signal IC -> semiconductor. Key specifications include 16-bit resolution with no missing codes, 200 ksps maximum sampling rate, 4 single-ended analog input channels, an analog supply range of 4.75 V to 5.25 V, and a digital supply range of 2.7 V to 5.25 V that simplifies interfacing to 3.3 V or 5 V microcontrollers without level shifters. The architecture provides true 16-bit performance with integrated track-and-hold, reducing external component count and settling-time concerns typical of discrete S/H designs. The die is rated for the industrial -40C to +85C operating range. Typical uses include portable instrumentation, multi-channel data-acquisition front ends, process-control I/O modules, and medical patient-monitoring equipment where four single-ended sensor inputs must be digitized sequentially at high resolution. Designers also deploy this part in factory-automation analog input modules and panel-meter designs that benefit from a small die footprint and the low power dissipation characteristic of SAR converters. When designing with the MAX1167C/D+, note that the die variant requires special handling for die attach and encapsulation, and that the QSOP-16 packaged counterpart MAX1167CEEE+ should be selected for conventional SMT board assembly. Reference voltages, decoupling capacitors, and ground plane recommendations in the manufacturer datasheet apply to both package options. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that are not consolidated in the manufacturer datasheet alone.
MAX1167CCEE+ - 16-Bit 200ksps 4-Channel SAR ADC | Maxim Integrated
The Maxim Integrated MAX1167CCEE+ is a low-power, multichannel, 16-bit, 200ksps successive-approximation analog-to-digital converter (ADC) that integrates a precision +4.096V reference, a reference buffer, an internal oscillator, automatic power-down circuitry, and a high-speed SPI-compatible serial interface, all in a 16-pin QSOP package. The device accepts four single-ended analog input channels selected through a digital multiplexer, with on-chip sequencing that enables autonomous scanning of all four inputs at full throughput. A successive-approximation ADC (SAR ADC) is a type of analog-to-digital converter that uses a binary-search algorithm against a precision reference voltage. SAR ADCs are prized for their deterministic latency, low power consumption, and excellent DC accuracy, occupying a middle ground between flash converters (fast but power-hungry) and sigma-delta converters (high resolution but slow). In the broader taxonomy, the MAX1167 belongs to the precision-data-acquisition family of mixed-signal ICs, sitting between sensor-conditioning front ends and downstream microprocessors or DSPs. Key features include 16-bit no-missing-codes performance, 200k samples-per-second throughput, ±1 LSB INL (max), and an integrated +4.096V reference with a buffered output capable of driving external circuitry. The IC operates from a single 4.75V to 5.25V analog supply and a separate 2.7V to 5.25V digital supply for digital-logic level shifting. Per-channel data averaging, on-chip digital filtering, and automatic channel scanning further reduce host-processor overhead. Per-channel analog and digital supplies are also pinned out independently for noise isolation. A typical SPI frame is 24 clocks long and carries 16 bits of conversion data plus channel and status bits, allowing direct connection to microcontrollers and DSPs at clock rates up to 4.8 MHz. The MAX1167's power consumption scales with throughput thanks to its automatic power-down between conversions, drawing microamp-level standby current while idle. A hardware RESET pin and software power-down mode round out the user interface. Typical applications include data acquisition systems, industrial process control, portable instrumentation, and multichannel sensor monitoring where the integrated reference, small PCB footprint, and 4-channel input mux reduce bill-of-materials cost. Engineers frequently select this part for weigh scales, temperature-pressure-flow sensor digitizers, and battery-powered patient monitors where low standby current extends run time. When designing with this device, allocate separate analog and digital ground planes joined at a single point beneath the IC, and bypass each analog supply pin with a 0.1uF ceramic capacitor placed within 2 mm of the pin. The internal +4.096V reference is suitable for ratiometric measurements but should be externally buffered if more than 1 mA is drawn from REFOUT. Ensure the SPI clock does not exceed 4.8 MHz to avoid violating the internal timing budget. This page synthesizes distributor pricing, drop-in package-compatible alternatives, and practical design notes not consolidated in the manufacturer datasheet.
MAX1169CCUD+ - 16-Bit 58.6ksps SAR ADC, I2C, 14-TSSOP | Maxim Integrated
The Analog Devices (formerly Maxim Integrated) MAX1169CCUD+ is a low-power 16-bit successive-approximation register (SAR) analog-to-digital converter (ADC) with a 58.6 ksps maximum sampling rate, an on-chip 4 MHz internal clock, a +4.096V internal reference, automatic power-down between conversions, and an I2C-compatible 2-wire serial interface supporting both Fast-mode (400 kHz) and High-Speed-mode (3.4 MHz) operation, all housed in a 14-pin TSSOP package rated for the 0°C to +70°C commercial temperature range. A SAR ADC is a successive-approximation-register analog-to-digital converter, a subtype of data converter that performs a binary search against the analog input using an internal DAC and comparator to resolve each bit in N clock cycles for N-bit resolution. SAR ADCs sit under the broader hierarchy of analog-to-digital converter -> data converter -> signal chain IC -> mixed-signal semiconductor. The MAX1169's 16-bit SAR architecture delivers zero-latency single-shot conversion, deterministic latency, and excellent DC accuracy, making it the preferred topology for multiplexed data acquisition, sensor readouts, and instrumentation front ends where the absence of pipeline delay simplifies firmware timing. Key features of the MAX1169CCUD+ include a true-differential analog input pair, an integrated +4.096V reference (also externally overridable), 8 analog input channels via an on-chip analog multiplexer, automatic hardware power-down that drops the supply current to a few microamps between conversions, an external clock option for applications requiring deterministic sampling, and a wide +2.7V to +5.25V analog supply range that simplifies interfacing with both 3.3V and 5V microcontrollers. The internal reference provides a stable conversion scale without the cost and board area of an external precision reference. The device architecture combines a capacitive-charge-distribution DAC, a high-gain comparator, and a successive-approximation register clocked by either the internal 4 MHz oscillator or an external clock. The I2C interface includes a 7-bit slave address and supports standard read/write, sequential read, and write/read combined transactions for efficient register programming and data retrieval. Power consumption at 58.6 ksps is approximately 1.2 mW from a 5V supply, falling to under 10 µW in the automatic power-down state. Typical applications include portable and battery-powered data loggers, 4 mA to 20 mA industrial sensor front ends, loop-powered transmitters, medical instrumentation front ends, weigh scales, panel meters, and any precision monitoring application requiring 16-bit resolution at modest sampling rates. The wide supply range and integrated reference simplify power-tree design in space-constrained modules. When designing with the MAX1169CCUD+, ensure that the analog and digital grounds are tied at a single star point to avoid ground-loop noise coupling into the reference, use a 0.1 µF ceramic bypass capacitor as close as possible to the AVDD pin, and oversample and average in firmware if you need ENOB beyond the 16-bit headline resolution. The device is part of the pin-compatible MAX1167/MAX1169 family, allowing migration to lower-cost 12-bit variants if 16-bit resolution is not required. This page synthesizes real-time distributor pricing, drop-in pin-compatible alternatives, and application-level design considerations that are not consolidated on the manufacturer datasheet, providing an information-gain layer for engineers selecting or replacing the MAX1169CCUD+ in precision data-acquisition designs.
MAX116CAX - 12-Bit, 2x4-Ch Simultaneous-Sampling ADC | Maxim
The Maxim Integrated (now Analog Devices) MAX116CAX is a 12-bit, 2x4-channel, simultaneous-sampling analog-to-digital converter (ADC) housed in a 36-pin SSOP (CAX) package with industrial temperature grading and gull-wing leads. It integrates four sample-and-hold (T/H) amplifiers that acquire two multiplexed inputs each, providing eight single-ended channels total, and supports throughput of 390 ksps at 1 active channel, scaling down to 116 ksps when all four channels are sampled simultaneously. An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that converts continuous analog voltages into discrete digital codes, and the simultaneous-sampling sub-category specifically uses one SAMPLE-and-hold per channel so that all channels are captured at the exact same instant. This is in contrast to multichannel ADCs that use a single shared SAMPLE-and-hold and sequentially scan channels - which introduces time skew between channels. Simultaneous-sampling ADCs sit hierarchically inside the data-converter IC family, which itself belongs to the broader mixed-signal / data acquisition (DAQ) IC category, ultimately under power management and signal-chain semiconductors. Key features of the MAX116CAX include a 2 microsecond per-channel conversion time, 8 single-ended analog inputs organized as two 4-channel multiplexed banks, an industry-standard successive-approximation register (SAR) architecture, a 36-pin SSOP surface-mount package, and industrial (-40C to +85C) operating temperature range. The successive-approximation architecture provides deterministic latency and inherent robustness in noisy industrial environments compared to delta-sigma converters that require complex digital filtering. The MAX116CAX uses an SAR core clocked from an external crystal or clock source, with an internal reference and channel-selection logic. Four matched track-and-hold blocks feed the SAR core via an internal analog multiplexer, allowing all four channels to be digitized in one conversion cycle with no inter-channel timing skew. This architecture is critical for phase-sensitive applications such as power-line monitoring, motor control, and multi-phase vibration analysis where the relative amplitude and phase between signals carries the engineering meaning. Typical applications include three-phase power monitoring and metering, motor control current/voltage sensing, multi-axis inertial and vibration measurement, industrial process control multi-channel DAQ, and instrumentation requiring correlated multi-channel sampling. Engineers select this part when phase coherence between channels matters more than raw single-channel speed. Design considerations include providing adequate bypass capacitance on AVDD/DVDDDVDDVDD rails, ensuring the analog inputs remain within the common-mode range of the track-and-hold amplifiers, and respecting the aperture-time matching spec between channels. The 36-pin SSOP package has moderate thermal resistance suitable for industrial environments but should be paired with a ground plane for digital-noise isolation. This page synthesizes distributor pricing, parametric comparison, drop-in alternatives, and practical design notes for the MAX116CAX that go beyond the manufacturer datasheet alone.
MAX116EAX - 2x4-Channel 12-Bit Simultaneous-Sampling ADC | Maxim
The Maxim Integrated MAX116EAX is a 2x4-channel, simultaneous-sampling 12-bit analog-to-digital converter (ADC) housed in a 36-pin SSOP package. It integrates four track-and-hold amplifiers with two multiplexed inputs (eight single-ended inputs total), supports throughput up to 390 ksps on a single channel, and delivers 2 us conversion time per channel with a successive-approximation architecture. What is a simultaneous-sampling ADC? A simultaneous-sampling ADC is a converter that captures multiple analog input channels at exactly the same instant using per-channel track-and-hold (T/H) amplifiers, then digitizes them sequentially through a single ADC core. This preserves the relative phase information between channels - critical in motor control, three-phase power, multi-axis vibration and synchronized instrumentation applications where skew between channels would corrupt measurement. The simultaneous-sampling topology sits within the broader data-acquisition IC family, which itself falls under signal-chain ICs in power and signal management. Key features of the MAX116EAX include 2 us per-channel conversion time, a +5V single supply, internal 2.5V reference (with external override option), software-configurable unipolar/bipolar input ranges, and an industrial operating temperature range of -40 C to +85 C. Throughput degrades gracefully with active channels: 390 ksps (1 ch), 218 ksps (2 ch), 152 ksps (3 ch), and 116 ksps (4 ch). The architecture pairs four dedicated T/H amplifiers ahead of an input mux and a 12-bit SAR ADC. Each T/H captures a sample at the same acquisition clock edge; the mux then sweeps the held voltages sequentially into the SAR core, producing 12-bit results with no inter-channel skew between acquisition instants. Software mode selection sets channel count, input range, and power-down behavior. Typical applications include three-phase motor current sensing, multi-axis vibration and motion analysis, synchronized instrumentation in industrial process control, and multi-channel data-acquisition front-ends. Engineers select it when phase-accurate sampling across channels matters more than raw single-channel throughput. When designing in this part, ensure the analog inputs remain within the configured input range and that the host allocates enough acquisition time for the maximum channel count at the desired throughput. The internal reference can be bypassed for an external reference when system accuracy demands tighter drift performance than the internal 2.5V source provides. This page synthesizes authorized distributor pricing, same-family drop-in alternatives, and practical design notes not consolidated on the manufacturer datasheet front page.
MAX116EAX+ - 12-Bit 8-Channel Simultaneous-Sampling ADC | Maxim
The Maxim Integrated (now Analog Devices) MAX116EAX+ is a 2x4-channel, simultaneous-sampling 12-bit analog-to-digital converter (ADC) housed in a 36-pin SSOP package, designed for multi-channel data acquisition systems requiring synchronized sampling. It integrates four track-and-hold (T/H) amplifiers with two multiplexed inputs per T/H, providing eight single-ended analog inputs total, and supports throughput rates of 390 ksps (1 channel), 218 ksps (2 channels), 152 ksps (3 channels), and 116 ksps (4 channels) with a 2 us conversion time per channel. What is an ADC? An analog-to-digital converter (ADC) is a semiconductor device that transforms continuous analog voltage signals into discrete digital codes suitable for processing by microcontrollers, DSPs, or FPGAs. The MAX116EAX+ belongs to the successive-approximation register (SAR) ADC family, which trades conversion speed for high resolution and low power consumption. In the broader signal-chain taxonomy, this part sits as: ADC -> data converter -> data acquisition IC -> mixed-signal semiconductor, serving as the bridge between analog sensors and digital processing. Key features include four true simultaneous-sampling T/H amplifiers that capture analog inputs at the same instant - critical for phase-sensitive measurements such as power-line monitoring, motor control, and vibration analysis where skew between channels would corrupt the measurement. The device operates from a single +5V analog supply and a +5V digital supply, includes an internal 4.096V reference, and provides a high-speed parallel interface for direct connection to microcontrollers or FPGAs. Architecturally, the MAX116EAX+ uses a successive-approximation conversion core with separate analog and digital grounds to minimize noise coupling. Each channel pair shares a T/H front-end that holds the input during conversion, and the two multiplexers per T/H let the user choose between two sources per channel without external switching. Power dissipation is approximately 50 mW during continuous conversion and drops to under 1 mW in software-programmed shutdown modes. Typical applications include multi-phase power-line monitoring, three-phase motor control feedback, vibration and modal analysis, sonar and acoustic beamforming, simultaneous multi-sensor data acquisition, and industrial process control. The simultaneous-sampling architecture is the defining feature for any application where the relative phase between channels carries information. When designing with this part, route the analog and digital ground planes separately and join them at a single point under the IC's GND pin. Use 0.1 uF ceramic bypass capacitors within 5 mm of each supply pin, and consider an external reference if absolute accuracy better than the internal 4.096V drift allows is required. This page synthesizes distributor pricing, drop-in alternative candidates, and practical design notes not consolidated in the manufacturer datasheet, helping engineers shorten selection time for multi-channel data acquisition designs.
MAX116EAX+T - 12-Bit 116ksps 8-Ch Simultaneous-Sampling ADC | Maxim
The Maxim Integrated MAX116EAX+T is a high-speed, multi-channel, 12-bit data-acquisition system (DAS) with simultaneous track-and-hold amplifiers, offered in a 36-pin SSOP package. It integrates a 12-bit 2us successive-approximation ADC, an internal +2.5V reference, a buffered reference input, and a 4-channel simultaneous-sampling T/H front end that preserves the relative phase information of the analog inputs. The -T suffix denotes tape-and-reel packaging, while +T is the lead-free RoHS-compliant reel option. A successive-approximation ADC (SAR ADC) is a type of analog-to-digital converter that uses a comparator and a binary-weighted DAC to step through bit decisions, one per conversion cycle, delivering accurate 12-bit conversions in a fixed number of cycles. SAR ADCs sit within the data-converter hierarchy alongside delta-sigma and pipeline ADCs, and they are favored in multi-channel industrial systems where deterministic latency and simultaneous sampling are required. The MAX116EAX+T occupies the data-acquisition-system sub-category, which combines an ADC with front-end signal conditioning in a single chip. Key specifications include a maximum throughput of 390 ksps for one channel, 218 ksps for two channels, 152 ksps for three channels, and 116 ksps for four channels, an 8 single-ended / 4 differential analog input configuration via two 4-channel muxes, a 2us conversion time per channel, and an operating temperature range of -40C to +85C. The internal +2.5V reference is trimmed to within 1.5% and can be overdriven with an external reference for gain or absolute-accuracy adjustments. The device draws a low supply current, supports a single +5V analog supply plus a +5V digital supply, and provides a high-impedance analog input stage. Architecture-wise, the four simultaneous-sampling T/H amplifiers let the user acquire four analog inputs at one instant, then convert them sequentially through the shared 12-bit SAR ADC without losing phase relationships. This is critical in three-phase power monitoring, vibration analysis, and motor-control applications where misalignment between channel samples would corrupt the result. The buffered reference input rejects reference-noise coupling from external loads. Typical applications include three-phase motor control and power-line monitoring, multi-axis vibration and motion analysis, industrial process control, data loggers, and instrumentation. The 36-pin SSOP package provides a compact footprint for dense multi-channel boards. When designing with this part, ensure the analog and digital supplies are well decoupled and that the input MUX bandwidth exceeds the input signal bandwidth to preserve settling accuracy.
MAX1177CCUP+ - 16-Bit 135ksps SAR ADC | 0-10V Input | Maxim Integrated
The Maxim Integrated MAX1177CCUP+ is a 16-bit, 135ksps, single-supply successive-approximation analog-to-digital converter (SAR ADC) with a true bipolar 0V to 10V analog input range, housed in a 20-pin TSSOP package. It combines a precision analog front-end, a factory-trimmed internal clock, automatic power-down, and a byte-wide parallel digital interface in a compact surface-mount footprint, delivering 16-bit resolution at sampling rates up to 135 kilosamples per second. An SAR ADC is a type of data-acquisition converter that uses a binary-search successive-approximation algorithm to digitize an analog input. SAR ADCs occupy the middle ground between flash converters (very fast, low resolution) and sigma-delta ADCs (very high resolution, slower). They are widely used in industrial control, instrumentation, and data-acquisition systems where moderate speed (tens to hundreds of ksps) and true 16-bit resolution with low-latency deterministic conversion are required. The MAX1177 family belongs to the precision data-converter hierarchy that sits between slow integrating ADCs and high-speed pipeline ADCs. Key features include a bipolar ±5V or unipolar 0V-to-10V analog input range (the bipolar -5V to +5V mode is selected by pin configuration on the MAX1177/MAX1178/MAX1188 family), automatic power-down between conversions for reduced average supply current, a factory-trimmed internal conversion clock eliminating the need for an external crystal, and byte-wide parallel output that interfaces directly to microcontrollers and DSPs without external glue logic. The 20-pin TSSOP footprint provides a small board area suitable for space-constrained designs. Typical applications include industrial process control loops, weigh-scale signal chains, multi-channel data-acquisition front ends, panel meters and digital multimeters, motor control current/voltage sensing, and battery test equipment where the ADC directly digitizes ±10V transducer outputs. The internal input protection and the +4.2V analog input range make it well suited for industrial sensor interfacing. When designing with this part, place 0.1µF decoupling capacitors close to AVDD and DVDD, route digital outputs away from the analog input trace, and avoid switching large currents near the analog front-end. The MAX1177 differs from the MAX1178 and MAX1188 primarily in analog input range, so verify your signal-conditioning range matches the chosen variant. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found on the manufacturer datasheet or on DigiKey/Mouser product pages.
MAX1177CCUP+T - 16-Bit 135ksps SAR ADC with Bipolar Input | Maxim
The Maxim Integrated MAX1177CCUP+T (Analog Devices) is a 16-bit, 135 ksps, single-supply successive-approximation analog-to-digital converter (SAR ADC) with an integrated track-and-hold, automatic power-down, factory-trimmed internal clock, and a byte-wide parallel interface, housed in a 20-pin TSSOP package (MO-153AC). Key headline specifications include 16-bit resolution, 135 ksps maximum sample rate, single 4.2V analog supply, and true-bipolar analog input capability (per the MAX1177/MAX1178/MAX1188 family datasheet from Analog Devices). A successive-approximation ADC is a type of data converter that performs bit-by-bit comparisons against a precision DAC to determine the digital representation of an analog input signal. SAR ADCs combine low power consumption, deterministic latency, and no-pipeline-delay conversion - attributes that place them in the data converter hierarchy alongside pipeline and sigma-delta ADCs. The MAX1177 belongs to the successive-approximation converter family, which is part of the broader analog-to-digital converter category under data acquisition and signal chain ICs. Differentiating features include bipolar analog input range on a single supply (eliminating the need for negative rails and level-shift circuitry), an automatic power-down mode that lowers IADC at lower throughputs, a factory-trimmed internal oscillator that removes external clock components, and a parallel byte-wide digital interface that simplifies connection to microcontrollers and DSPs. The TSSOP-20 footprint is JEDEC-standard MO-153AC, allowing drop-in compatibility across the family and across the broader 20-pin TSSOP ADC landscape. Architecturally, the device uses a switched-capacitor charge-redistribution DAC for SAR conversion, an input track-and-hold stage with bandwidth sufficient for full-scale step inputs at the maximum conversion throughput, and digital control logic that sequences conversion, power-down, and bus handshaking. The bipolar input is achieved by on-chip level shifting of the input range relative to the analog supply, allowing true ±VREF bipolar measurements without external negative supplies. Typical applications include industrial process control data acquisition, multi-channel PLC analog input modules, precision sensor signal conditioning (load cell, strain gauge, pressure transducer), instrumentation front-ends, and portable/handheld measurement instruments. The automatic power-down and 135 ksps throughput support both multiplexed multi-channel scanning and single-channel high-resolution measurements. When designing with this device, place the supply bypass capacitors as close as possible to the AVDD and DVDD pins and ensure the reference voltage source has adequate drive strength and decoupling. The parallel interface timing must be respected in the microcontroller firmware, particularly the conversion-start and busy-flag handshake sequence documented in the datasheet. This page synthesizes distributor pricing (as of 2026-10-14), same-family and cross-brand drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
MAX1177CEUP+ - 16-Bit 135ksps SAR ADC +18V Input | Maxim Integrated
The Maxim Integrated MAX1177CEUP+ is a 16-bit, 135ksps, low-power successive-approximation analog-to-digital converter (ADC) with a true bipolar 0 to +10V analog input range, housed in a 20-pin TSSOP (4.40mm body, MO-153AC) package. The single-supply +5V ADC integrates automatic power-down, a factory-trimmed internal clock, and a byte-wide parallel interface that simplifies connection to microcontrollers and DSPs. A successive-approximation register (SAR) ADC is a type of data converter that performs a binary search across an internal capacitive DAC, one bit per conversion clock cycle, to resolve the input signal against an internal or external reference. The MAX1177 belongs to the SAR ADC family within the data converter hierarchy, which also includes sigma-delta, pipeline, and flash architectures. SAR ADCs are preferred where low-latency sampling, single-shot conversion, and a simple synchronous interface are required - making them a workhorse of industrial control loops and instrumentation front ends. Key specifications of the MAX1177CEUP+ include a 135ksps sampling rate, 16-bit resolution with no missing codes, +/-1 LSB INL (typical), an internal +4.3V reference, and input overrange tolerant up to +18V (with series input resistor divider). The 0 to +10V true bipolar input eliminates the need for external signal conditioning in many industrial applications. The device draws 26.5mW (external reference) or 31mW (internal reference) at full throughput, and AutoShutdown reduces idle current to 0.4mA at 10ksps. Typical applications include industrial process control data acquisition, multi-channel PLC analog input modules, portable and battery-powered instrumentation, medical patient monitoring, and data loggers. The wide 0 to +10V input range directly accepts signals from industrial sensors and 4-20mA loop receivers terminated across a sense resistor. When designing with the MAX1177CEUP+, place 0.1uF and 10uF decoupling capacitors as close as possible to AVDD and DVDD, and provide a low-impedance ground plane. Use 1% metal-film resistors in the recommended input divider network for accurate calibration of the +/-10V range. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.